This way, it will be possible to use Galileo and it's UART ports without
PCI_ENUMERATION set.
Change-Id: I9498aca818b128a6ee69fde21aa5c4b9cd6bc1ad
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
No need to keep track of PCI class's bus and dev. First, there might be
more than 1 bus and/or 1 device which would hold the same class.
Secondly, with the new PCI_ENUMERATION option, enumeration PCI device is
now optional and it's advised to unset such option and statically
configure the PCI information of the devices (to gain in booting time
and code size). So finally removing all of this.
Change-Id: I395d08c8f6f5e76431af59aa6fc9b30d703f2e75
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The option is being referended by the same file
but is not being defined anywhere.
Change-Id: I5e0ec4c29cba773a5256bae52190a117fcc12bf3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Put relevant items under the same menu and move compile options
out of general setup and make it a top level menu.
Change-Id: I8125418e19cb6ffd08825d30c07058ec0d943ba3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I151b3c6516b9b5a38ab0da2948c951eb69d57498
Signed-off-by: Adrian Pochiu <adrianx.pochiu@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The _ARC_V2_IRQ_VECT_BASE register must be set to the vector table in
flash.
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change-Id: Ied5451c98222f545cd669967023aef26c3d8e48e
Revises and supplements information on concepts.
Change-Id: I7dd9dd2e99cd5d975cc0f617b076dcf13c414fd0
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
also add a readme saying files here are auto-generated.
Change-Id: Id33056192d8020c6cddcd12f406d15384db374ac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Only one wrong is sufficient to fail the test: the found device is not
the one we are looking up to.
Change-Id: I2a54b5683fedf7d54de1e1553aecba40b6b6b2e1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Revises microkernel object sections to make it clear that objects
are referenced by name. (e.g. MY_TASK) Also adds text to make it
clear that task groups are named entities.
Change-Id: I3480f3526293dae7a0bab2006250c97334e04dfb
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This will help when debugging, since there might be different bus and
device on the same target.
Change-Id: I886a256f14a960d2faed71561416ee3bee20af1e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Finally switched from ldw/stw to ldh/sth, as Benjamin noticed in an
earlier comment (I was using ARC ISA, and not ARC V2 ISA). So indeed
ldw/stw are obsolete and equivalent to ldh/std.
- clear, set and test were not working in case of using a memory address
which would not point to a register: bclr, bset and btst requires
registers as operands, and cannot deal with pure memory address (i.e.
something like [rx] is not valid), thus the requirement to load first
the value pointed by the address into a register, operate on that
register and storing the result of it into the pointed address.
Change-Id: Ib9c24c0a2c6d2b02e2d08d24f31cbc1981536a7d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This file is now built as part of the host tools and
should not be checked in by mistake.
Change-Id: I03af1db752f96bc2c238e29506b10d4d16c62e2e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This options does not exist anymore, no need to carry it
here.
Change-Id: I0bcafe2ff959dbc2e0fcc3f9481b65c43ea64f14
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This sample builds multiple kernels with different configurations
starting with a minimal kernel that basically does nothing and
adds features one by one to measure the minimal footprint for the
various supported kernel objects and features.
Change-Id: Icba984845dc6f1979d16ba246bdb133cc6e3465c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This was messed up due to lack of arc platform to test.
Change-Id: I5abda172dddf54532c1bcb66f36d02db7f7d7ff4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The platform configurations micro_ti_lm3s6965_defconfig and
nano_ti_lm3s6965_defconfig are obsolete. The correct names
are micro_basic_cortex_m3_defconfig and nano_basic_cortex_m3_defconfig
respectively.
Change-Id: I0642008355a1abc70bc89db5202dab8266af4542
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The term "generic pc" is obsolete and has been supplanted by "ia32" and
"basic_xxx" as appropriate.
Change-Id: I7064eead81d526e2df89a7ccbfe1879f2e402f41
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The event portion of the app_kernel benchmark no longer outputs the following
(abbreviated) error message:
<path to project>/app_kernel/src/event_b.c:86 Error: tick occurred
This error was occurring as the benchmark test had hard-coded the value of
the event TEST_EVENT to 0 instead of defining it in the prj.mdef file.
Consequently, the system was using event 0 for the tick event; every time
task_event_send(TEST_EVENT) was invoked, the system treated it as a tick event.
Change-Id: I1a785a6594415bd4b0300d382f76a6d768641864
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Adds a note to the mutex documentation indicating that the priority
inheritance algorithm caps the raising of the priority at PRIORITY_CEILING.
Change-Id: Ie87efe83e3fa0fc8ba55e584692f8de44347eb1a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Corrects the description of the priority inheritance algorithm used by mutexes.
It also draws attention to one of its short-comings.
Change-Id: I5aba6221fb9e9ed78e3bfe6509ca3d6e13743e71
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Adds in a couple of pieces of useful information which improve
alignment between task documentation and fiber documentation.
Change-Id: I04b65aa6d125842205de3dd6a65dbe2b8e6853d6
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Provides additional details about the use of fibers, following
the standard format now being used for kernel services.
Change-Id: Iee5cca7af213259f1dec53d75b729388fcf93bf8
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Fixes the following error when generating the apps_microkernel documentation.
.../apps_microkernel.rst:57:ERROR: Error in "code-block" directive:
unknown option: "lineos".
The option was supposed to be "linenos". The generated HTML document now
properly displays the sample MDEF file contents.
Change-Id: I510f2783ff656e980e222ffc6dc213e8dd45d136
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Other apps are being compile-tested, do this here too.
Change-Id: Ibbe9e765757564e974233c1410bac320ae7a8a68
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The profiler now uses the generic ring buffer. The dropped event
count is stored in the ring buffer's value field. The data size only
refers to the extra data attached to the message and NOT any internal
representation of metadata inside the ring buffer, the event_logger
APIs now pass this information along in dedicated parameters.
Change-Id: I1f168e6a05e8d937bf86b2a4cccecbb04b0118c6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch is based on some code contributed by Dirk Brandewie.
This is a generic data structure for queuing data in a FIFO ring
buffer. Any given data enqueued is annotated with an app-specific
type identifier, and small integral value. Use of a data pointer
is optional if the necessary information can be conveyed in the
annotations. We want all the metadata to fit in a single DWORD.
The ring buffer always contains at least one free dword in the
buffer to correctly distinguish between full and empty queues.
Concurrency control is almost nonexistent; depending on usage,
apps may want to introduce the usage of semaphores and/or mutexes
to preserve the integrity of the ring buffer or provide notifications
when data is available.
Change-Id: I860262d2afc96db4476d4c695a92f7da355ab732
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Renames the document to better reflect its true nature -- it is
a reference guide that provides information about existing platform
configurations, not a "how to" that provides information about
creating a new platform configuration.
Re-orders the platform configuration entries so that they appear
in alphabetical order, and moves the links to the individual
platform configuration sections to the end. This allows a reader
to use the table to identify a platform configuration of interest,
then click on the link that follows to obtain more details.
Note: It would be ideal if the link to a specific platform configuration
section could be embedded in the associated table entry, but the :ref:
tag doesn't seem to allow this.
Change-Id: I8865dcb54b8abd92658e00c3d7d17dcead4442ac
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The "introduction" section adds no value, and has already been
pruned from all of the other platform configuration guides.
Change-Id: I13bfd39d4806b3dd213a0d3f9023fd41e415db2a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Adds in a label that can be used to reference the nanokernel semaphore
documentation, similar to what's available for other nanokernel services.
Change-Id: Ic97852e85b41a9e6e778dde820b98ea5be5f06f1
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Doxegenize and cleanup headers for nanokernel
- fibers
- context
- timers
- stacks
Also minor cleanup of x86/arch.h
Change-Id: Ib65568d4ec034b69e8a6214ba4b52a7f719300bb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
