Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the mask parameter to initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the hard-coded device-specific pin count to
initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The offset and the number of pins were swapped causing an error when a
64-position left shift was generated to calculate the pin mask.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it. Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. The devicetree binding does not inherit from
gpio-controller, so the required property is not available there. A
hard-coded value of 32 pins has been implemented to make the driver
function.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC; until aliases for the new properties are added the
code assumes all pins are supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace the common data structure with the common config structure as
a prefix of the driver-specific config structure and use the
devicetree GPIO pin counts to initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Extend the driver data structure with a field that identifies the pins
supported by the device. Document the fields and who is responsible
for maintaining them.
Update all configuration functions for specific pins to return an
error if the pin is not supported.
Update all set/get functions for specific pins to assert if the pin is
not supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several declarations provided a const pointer to mutable data. Change
all declarations that are not used to change the invert field to be
pointers to const data.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since this was converted to the setup/handle/process idiom in master
the conversion is straightforward.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update the intel_s1000_crb test app:
() Update configuration calls to use new flags.
() Separate pin configuration into setting it to input, and
setting the pin for interrupt.
() Use gpio_pin_get/set() instead of gpio_pin_read/write().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit updates the HMC5883L driver to use the new GPIO API.
Also add a note explicitly describing the active state of the DRDY
pin in the binding file.
Tested on frdm_k64f.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
Update sample overlay for missing chip select and to deconflict with
UART TXD. Add GPIO flags to configuration state. Replace callback
enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a sample overlay. Add GPIO flags to configuration state. Replace
callback enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Put all the devicetree configuration data into a config structure in
flash, which removes some ultra-long identifiers from the code and
makes it more readable, and prepares for multiple instance support.
Consistently use the interrupt signal datasheet name for all objects
that are specific to that signal, including configuration structure
tags and function names.
Update the trigger idiom for setup/handle/process stages.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Converts the fxas21002 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on the hexiwear_k64 board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Update the gpio_counter sample app for the UP Squared board:
() Update configuration calls to use new flags.
() Separate pin configuration into setting it to input, and
setting the pin for interrupt.
() Use gpio_pin_set() instead of gpio_pin_write().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a board overlay for up_squared to be used with
the GPIO sample. Using the overlay is because the pins
being used are not actually LED and switch but GPIO pins
used as such.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This maps devicetree GPIO phandle arrays from the full controller pin
range to the sub-controllers required by Zephyr's limit of 32 pins per
controller device.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update driver code to use new GPIO configuration flags such as
GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There were complains about the unit-address and first reg
not matching. So update the DTS file to match.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update bluetooth hcp spi driver to new GPIO API.
Following changes have been done:
- Use new gpio api functions
- Get reset, irq and cs flags from dt defines
- Define reset pin as active low and invert set/unset logic.
Tested on disco_l475_iot1 and 96b_carbon.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Converts the fxos8700 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on frdm_k64f and rv32m1_vega_ri5cy boards. The latter verifies
that the reset output works correctly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
