Commit graph

41120 commits

Author SHA1 Message Date
Andrew Boie
c065ed5d78 x86: reduce footprint of exception debugging
We're smart, we can look up the vector IDs in a book if we
don't already know what they are.

Change-Id: Iaff3986d7c96dea597be4b2a5b13721ab57980fa
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
9fce2a2209 Remove obsolete ctors section
Remove prototype support for C++ constructors, since it is not well
designed. Device drivers (or other application code) that requires an
automatic initialization capability should use the device initialization
macros instead.

Note: Support for C++ constructors may be re-introduced at a later date.
However, a number of issues need to be settled, such as when the
constructors are invoked and what context they run in. (Running them
during nanokernel initialization, as was previously done, is probably
not the right approach.)

Change-Id: If6d27ac16b485cb39d5ec34084e9d0f1991074f4
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
067ed49efc k20UartDrv: Fix k20_uart_fifo_read()
Fixes the logic in the routine k20_uart_fifo_read() so that it reads the
data from UART if the status register 1 indicates that data is available.

Change-Id: I1722b013e05c7477587c07f5a0b90c753ba34aab
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Anas Nashif
833fb90087 doc: fix parameters to IRQ_CONFIG
Change-Id: I5c3e22ad2311faf76ada79a61eac7ccac5864334
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:43 -05:00
Andre Guedes
5b847c0aa2 x86: Fix IRQ_CONNECT_STATIC documentation
Since commit 3d7b21b69e the 'priority' parameter is used by the macro
IRQ_CONNECT_STATIC. This patch fixes the macro documentation which
says it is ignored.

Change-Id: I56eec49466a33441fa1822af78956ebb7f5c24ce
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:24:43 -05:00
Anas Nashif
f75a8157e3 sanity: exclude Minute IA platforms from float tests
exclude Minute-IA platforms from tests that enable CONFIG_FLOAT.

Change-Id: Id186857403cb73d009b6e9e126c4e240f95dbf1a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:43 -05:00
Anas Nashif
8ea9d02cdf sanity: add extra arguments when creating defconfigs
When config_whitelist is used in a testcase that has extra
arguments, those were not set correctly and the test case build would
fail in some cases.

Change-Id: Idb8a4f07d29beefe62de932afa7cc0986e8dd1d4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
111323fc90 doc: Fix typo in nanokernel semaphore APIs
Change-Id: If3206b3113b7a47efc520887f53b3299e8da2404
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Vlad Lungu
3fc0f0f422 fsl_frdm_k64f: Increased NUM_IRQS to 86
Needed for the Ethernet MAC

Change-Id: Iecef5be818c87c34280ea32123f05b8f5974a998
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
665dd5d331 galileo: disable SPI_PORT_1 by default
Unused, uses IRQ17, which conflicts with UART1.

Change-Id: I5d285ee8a2e7e5d45b38a85a417bd36f0e4bb92e
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Dmitriy Korovkin
ea5ff12110 galileo: Add ADC configuration
Change-Id: I694d2812496220e54e757cb89ce0c529f3bad48f
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
3f97f24b33 adc: Fix dependencies
The ADC implementation requires that the kconfig option NANO_TIMEOUTS be
enabled as it uses the routine fiber_delayed_start().

Change-Id: Iec49fec4badd3fcf173a2d2cc9d2924299190150
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
c7a76a226d galileo: Fix SPI speed and configuration values
Change-Id: If15b2931e00d3a5748a56cea673e694389a7e963
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Johan Kruger
7a9fa51b61 pwm: Changes to PWM driver for the PCA9685.
- Changed behavior of duty cycle to have the signal ON time as the
  duty percentage instead off the off time. Note however, this requires
  that the off time is controlled. The behavior seems to be inverse of
  what the user will expect on the header IO.

Change-Id: I1e7abf0324509de375d545a0215fd1edf2283814
Work-by: Johan Kruger <johan.kruger@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
c5b10c6006 x86: Display registers on fatal error
Change-Id: Idb05fbb707f2c95173423c928acda2a07e962989
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
6338c4518c x86: Update NANO_ESF and NANO_ISF structures
As the system always operates in ring 0, neither the SS nor ESP registers
are pushed onto the stack when an exception or an interrupt occurs.
However, as the ESP field is still relevant to debugging fatal errors, a
place has been carved for it in the NANO_ESF.

Change-Id: Ibb2578c69fa6365fd6e9dbf7b51f461063dadc68
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Peter Mitsis
e7018455d8 x86: Remove cr2 field from NANO_ESF structure
As page fault exceptions can not occur in the system as it is currently
designed, there is no need to track the CR2 register as part of the
exception stack frame.

Change-Id: I75d7a74c5d2c6efcc0e9141d2662861bc2052629
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
b0edae6047 x86/qemu: do not use -no-reboot flag when REBOOT=y
The -no-reboot flag causes QEMU to exit when trying to reboot through
the RST_CNT register.

Change-Id: I01262753587d2fc4e787262a8368ddba39fdeaa1
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
f9127ecf52 reboot: add support for galileo
Implementation of the sys_arch_reboot() call for galileo, using the
RST_CNT register (I/O port 0xcf9).

Change-Id: I00fbf4aaaf746f640674da6880e1d6c5aa230e06
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
826edfc16b reboot: add reboot infrastructure
Add the REBOOT kconfig option, along with the sys_reboot() API.

This infrastructure is not enough to actually perform a reboot.
Architecture/platform code must be provided as well, in the form of a
sys_arch_reboot() function.

Change-Id: I5b2b15855ff06453f2764f3e3b3b7d6a4a078723
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
55afb68e83 x86: remove NANOKERNEL guard around nano_cpu_idle()
It can be used by some subsystems even in a microkernel.

Change-Id: I07241aab94ecf67c94dce2d05f2cd774b2a6b044
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
1e60ee31bc timer: allow enabling of sys_clock_disable()
Create the SYSTEM_CLOCK_DISABLE configuration option.

Change-Id: I9174fa2758988240d0850233146bb1e1d37a07c3
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
ac1148e1de timer: rename SYSTEM_TIMER_DISABLE/timer_disable
Rename them to SYSTEM_CLOCK_DISABLE and sys_clock_disable to put
the symbols in the proper namespace and to align with the rest of
the timer APIs.

Change-Id: I341cdb1bd6cc01e5662d8526c293d4e0acd6ec24
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
d44799de3e systick: remove unused stack variable
Change-Id: I065814867bf8f150e420412d45fadc10e6af7485
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:43 -05:00
Benjamin Walsh
c433fc7f8a test: add nanokernel mem_safe test
This test can only be executed on x86.

Change-Id: I4fe60dbee9dcb11f983855b507f53c2b9fbb54d0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:42 -05:00
Benjamin Walsh
760f191b1e debug: add safe memory access routines
Introduces the following routines to provide safe access to memory:
   _mem_probe()
   _mem_safe_read()
   _mem_safe_write()
   _mem_safe_write_to_text_section()
Those routines will return an error if the memory is not accessible rather
than potentially crash.

This implementation is based on the image's boundaries; thus it allows
read/write access to the data/bss/init sections and read access only to
the text/rodata sections.  All other memory is considered invalid, even
if addressable. This includes the leftover from the RAM at the end of
the image, since there is no support for using it (e.g. there is no
dynamic allocator).

Change-Id: I6093688ecfd9b00d61be0fd453ada7bb8915c897
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:42 -05:00
Benjamin Walsh
3ab75623fa x86: add kconfig options for RAM/ROM size
CONFIG_RAM_SIZE
	CONFIG_ROM_SIZE

Available to x86 based platform configurations.

Change-Id: I3dda770a9063e3c717023b1a83761f32caa2c590
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:42 -05:00
Peter Mitsis
3e06e7293f arc-linker scripts: Add _image_[ram|rom]_[start|end] symbols
Adds the following standard symbols to the arc linker scripts:
	_image_rom_start
	_image_rom_end
	_image_ram_start
	_image_ram_end

Change-Id: Ib1dfa1dcb85140193557e72536145e74eb3ebb91
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:42 -05:00
Peter Mitsis
abc1694614 arc-linker scripts: Replace __text_start/end symbols
Standardizes on using symbol names _image_text_start and
_image_text_end instead of __text_start and __text_end.

Change-Id: I160ed6b4f117483fcffdfa04ce10bd6a5151704a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:42 -05:00
Benjamin Walsh
c12c234f38 linker scripts: add _image_text_start/end symbols
Change-Id: Ic6026337c668482f0226d040138fb798a10d4ecc
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:42 -05:00
Benjamin Walsh
09303f7f68 linker scripts: add symbols for ROM/RAM boundaries
These symbols have more meaningful names when trying to figure out where
the ROM/RAM starts/ends, rather than relying on e.g. __data_rom_start for
the end of the ROM (__data_rom_start is the beginning of the data in
ROM, thus is not part of the image).

Change-Id: I4aa0354ee414fd0d46d0f40952e091ba090e7bce
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:42 -05:00
Anas Nashif
f80bc35d58 toolchain: update iamcu toolchain version
the iamcu toolchain is based on 5.2.1, update the variable so we
can point to the right path of headers/libraries.

Change-Id: Ia1634efc6fb6a37eb3456d9b7bd3c30e03c40b4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:42 -05:00
Juan Manuel Cruz
d34b8f62ae gpio: ioapic stubs apply only with IOAPIC
ioapic_mkstub applies only when an IOAPIC is available in the platform.

Change-Id: I40294e4c11ef04739a1ce2146d125f3c5478013d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
1e15f54fec doc: Prevent accidental commit of Kconfig index file
The Kconfig documentation index file is auto-generated. Adding it
to list of files ignored by git so that it isn't added by accident
in the future.

Change-Id: I763a3d3d9382bec843e1e4ddfc198f756bb5cb80
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
05d6c92621 x86: cpuhalt: rewrite using inline assembly
Eliminates issues with compilers that have different C calling
conventions.

Change-Id: I9318edd5eea6b6bacdf3da2c28e0e29315d5cdf5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
033ee894b9 x86: use GCC inline asm for MSR read/write
Eliminates issues with compilers that expect different C
calling conventions.

Change-Id: Ic70a15926380671a7b9c058b53400b10b5c870a7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
6bf328b6ea x86: use GCC inline assembly for atomic operations
This doesn't make any assumptions on calling conventions or
the structure of the stack, and should thus be portable to
compilers that implement different C calling conventions.

In order for the rewritten functions to take up the same code
size as the pure-asm counterparts, -fomit-frame-pointer has
been specified for each of them, otherwise an extra 4 bytes
is used for every function.

The generated assembly code by these new functions has been
verified in GDB to be the same as the old ones, except a few
trivial things like particular registers used.

Change-Id: I9a896cbfc3e7f4c2497d749140729d28b32f1c9d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Anas Nashif
98c50de9ff checkpatch: Allow space before [ in the case of inline asm
This allows the customary syntax for declaring named arguments,
such as:

asm ("mov %[out],%[in]" : [out] "=r" (x) : [in] "r" (y));

Since :[ is comple-error-inducingly invalid syntax in other cases,
this won't create unintentional leniency for normal uses of [

Originally from https://lkml.org/lkml/2010/11/16/145 by Dave Martin

Change-Id: Iead3fdb147ba2f6cbd108f19dd348bb72a7e6b6f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:42 -05:00
Anas Nashif
2fced15758 sys_io: include nanokernel.h
sys_io.h documents the functions but does not include the
actual implementation. Make it include nanokernel.h which
would then pick the right arch.h where the sys_io are implemented.

Change-Id: I275d03cfc0d7e14cb603e37211e7a618d53616bd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:42 -05:00
Michael LeMay
2ad663da92 gpio: dw: Fix ISR initialization and add NULL checks
This patch updates the ISR initialization code to reflect recent
changes in the underlying Zephyr ISR infrastructure.  It also adds
assertions to detect failures to lookup device bindings during
initialization.

Change-Id: I4bf1955da44a97f8c2652b96a390804c5cea73e3
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
099e5a3018 doc: Fix typo in memory map documentation
Change-Id: I03f80ae966c4152db7182864428a849d8ca43cc7
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
ab7f788adc kernel: Minor optimization of event & semaphore include files
Since it is now possible to send both events and semaphores from
a fiber or ISR without having to use a command packet set, there
is no longer any need to reference the command packet include file.

Change-Id: Ibf2d96bc8ef0fd2a3db6f896c7a1201ab9b85bf7
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
0c8965fd99 kernel: Specify alignment of microkernel server command stack items
The microkernel server now relies on the fact that the command packets,
events, and semaphores passed to it via its command stack are 32 bit
aligned. This change explicitly ensures this alignment, rather than
leaving it to the compiler's discretion.

Change-Id: Ied7a0a0b4cc504c924520b72ef2b207b49470448
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
7ed2678916 doc: Remove documentation for microkernel command packet sets
Update semaphore documentation to remove mention of command
packet sets, which no longer exist.

Change-Id: I19303f7f497b7d8299723d01c91ae4f4513162f0
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Allan Stephens
7c4b9ce1f7 kernel: Eliminate the need for command packet sets
Revises microkernel semaphore sub-system to allow ISRs and fibers
to give a semaphore without having to define a command packet set.
The microkernel server now supports a 3rd command type on its
command stack, allowing a semaphore to be given in a similar manner
to the one used for the existing "give event" command type.

Change-Id: Ibd7fb1a77949792f72acd20a9ee304d6eabd62f7
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
30f01d86e0 x86: remove CONFIG_LOCK_INSTRUCTION_UNSUPPORTED
This was only needed on legacy platforms which are no longer
supported.

Change-Id: I4a3312f3698c4fc8bbf0df4610af7b69a9056f80
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Tomasz Bursztyka
9b9367176e spi: intel: Fix byte flow and error handling
- ROR interrupt needs to be acked by resetting the bit to 0
- Rx threshold seems buggy on that controller and setting it above 1
  generates unreliable transmission as sometimes it does not trigger any
  interrupt though the rx fifo is just full.

Change-Id: I4949c1fe7b42c70973efd4e0dafd14c6171f13f6
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
8a2104e16a x86: remove CONFIG_UNALIGNED_WRITE_UNSUPPORTED
This had bit-rotted to the point where it was breaking the build
and was only needed on legacy platforms that are no longer
supported.

Change-Id: I4fcfc38bacac58761fba475701e0c27d7b8b7a27
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie
5e1ae08765 loapic: get rid of function call overhead for _loapic_eoi()
We generally call this in interrupt code, and since it's just a register
write, get rid of all the function call overhead.

Change-Id: I251fa3cee0841fcdd8eecc7941d4d3782d112e66
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Anas Nashif
6de1c20809 core: remove NO_ISRS feature
This option is not building and currently not supported, removing
it because there does not seem to be a use case for it.

Change-Id: Idb8ffedf83f43cffc68a01573c6f2d1a90fc40fb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:42 -05:00