CONFIG_NUM_IRQS expresses the total number of available interrupt
lines in the system, and is used to generate a vector table.
On ARC, the vector table is assembled from two parts, _VectorTable
for the first 16 entries (reserved for CPU exceptions), and
_IrqVectorTable for the remainder. The code that creates _IrqVectorTable
was not taking this into consideration and was 16 entries too big.
Change-Id: I676c8534274de8782178f3773bc53a817b89481f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
On ARC the IRQ and exception vectors are just one big array of
function pointers placed at the very beginning of the binary in ROM.
Vectors 0-15 are for CPU exceptions, 16-255 for interrupts.
In Zephyr these have been logically split into an execption table
followed immediately by the IRQ table, specified in the ARC linker.cmd.
However, the exception vector table defined in Zephyr had only 14
entries so the IRQ table was misaligned by 8 bytes. This went undetected
for some time as in the default configuration every entry in the IRQ
table pointed to the common demux function _isr_enter().
This patch correctly ensures that the IRQ table begins at address
0x40000040 instead of 0x40000038 like it had been.
Change-Id: I3b548df0dcabeb9d986ecd6a41e593bd02e3bd73
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Causes problems for large values of CONFIG_NUM_IRQS.
Some inconsistencies have been noted in how CONFIG_NUM_IRQS is
used on these platforms, with bugs filed. This patch preserves
existing behavior and has been shown to generate the same number
of table entries for both arches using objdump.
Change-Id: I1d3ac5466978acb56e88a6dc3cbe7cc09431e94d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The production version is slightly different than the internal
development board, so the pin mux description has been updated.
Change-Id: I0235ed9eb480a1fd713843dd1b3b5c7856e7132b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Let the SoC decide the number of the IRQs. Fixes a bug where
Quark SE gets the default instead of the declared value in the SoC
Kconfig.
Change-Id: I978c923fbe2a0737ace27ec951bc3a46e8976584
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
_IrqVectorTable was renamed to _irq_vector_table
Change-Id: I1488bebc7d8174c08f3ce2dc8bcace6ef567aad6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We moved away from quark_d2000_ref_board and use crb for this board.
Change-Id: Ida1fb1675134c4eff7ecd9bf2e1cd1338df7635c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update the crosstool-ng .config files to build the most recent
gcc compiler (5.2.0) and update the configuration of the xtools
variant to use this compiler.
Change-Id: I8c895943a9db8637abf294da36df35040ae7527f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The option is used in the code but was never declared.
Change-Id: I17552c225936652e9208f53a884311eb81cb79a6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Shorten the name and remove the vendor prefix. No need to add
vendor to board names.
Change-Id: I68d441121c4034276706da63d7e5420ddf317149
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Rename class in pci_dev_info struct to allow to use C++ compilers.
Updated drivers to use new struct.
Change-Id: I17b94cb7bc094bccd615c8389a28589bfa90cab8
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Even though the OS is 32-bit, 64-bit BARs can still be mapped into
32-bit address space.
64-bit BARs occupy two entries instead of one, so the offset of a BAR
isn't necessarily its index multiplied by 4. To cope with that, hold an
extra offset field in the lookup structure.
Only 3 bits are required for index as well as the offset since the there
are up to 6 BARs.
Change-Id: I0d4955a3aca70b7fc81a1df06ab5f9f45793c70f
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Both WIFI_DISABLE_N & PCIE_RESET_N are output pins which control the
mini-PCIe, so fix the pinmux settings accordingly.
In addition, to avoid resetting the mini-PCIe card, keep PCIE_RESET_N
high.
Change-Id: I7478a7ee5771d8840c53ec4e9cc15551d31653e3
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
The PCI device information for both i2c ports is missing, resulting in
broken PCI enumeration.
Fix this by adding the missing PCI device information.
Change-Id: I5d1739cc994491c34a2a938166a9e56a082ed32e
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
The current scan loop does not re-initialize the device number, so only
the first bus is scanned.
Change-Id: I9dc97cecd5652c353b09ab5692f59f562436f902
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Only the first port is currently enumerated on the PCI bus. As a result,
the second port configuration will be set based on the default options,
that may be invalid on some platforms.
Fix this by enumerating the second port as well.
Change-Id: I63733a1f13f7cb35cae1dba3b6192dcd61c9f644
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
MinGW does not provide mman nor arpa/inet.h library.
This patch modify fixdep to work with windows without
using those library.
Change-Id: I3908735d0d989b165f2adb70b21f4cd41c8e15a6
Signed-off-by: Louise Mendoza <yonattan.a.louise.mendoza@intel.com>
This patch change the custom macro WINDOWS for the macros
provided by the compiler to determine if it is being build
on Windows or Linux to use the correct flags for opening files.
Change-Id: I7278439767e93754eaae831b6f234b48c3ac8eac
Signed-off-by: Louise Mendoza <yonattan.a.louise.mendoza@intel.com>
ADC allows to program repetitives sampling after a read request.
User should be able to provide buffers for each table entry that can
hold subsequente repetitive samples.
Change-Id: I75da4a480a0e3f241d9276cf4fe3999a9cfbba2c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Sanity test is disabling the ADC controller before doing a read.
Change-Id: I275a94244a13e80c12e6b39267c4a25dd5479002
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Buffer management on dw driver was too complex.
New buffer management follows the following behavior.
- Each sequence entry have one sample at a time.
- Each sequence entry have a buffer to store that sample.
- If ADC have repetitive sampling configuration, the buffer value
is overwritten with the new value.
New buffer management allow us to remove Synposys'
files and license headers as well.
Change-Id: I75bbbee59bea400839bb34ca1fcb2111073f99d0
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Fixes interruption connection parameters, ISR parameter is not null anymore.
Removes irq_connect call that is a dynamic irq api that should not be
used along static irq api: IRQ_CONNECT_STATIC and IRQ_CONFIG.
Change-Id: I232c8562d2dcda3229776b561e2c1f4608a31cdd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The current gpio_dw_initialize implementation masks the interruptions in the line
dw_write(base_addr, INTMASK, ~(0)) to assign api functions and initialize
interrupt vectors and handlers safely. Immediately after this, the driver expects
that gpio_dw_unmask_int(port) unmasks the interrupts. Without this patch that
implementation is empty for the quark se ss board.
Change-Id: Iac84c8807fcadad8c256c3fcaa4ff624b6337bf3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Note that the A->Comm is a pointer to the microkernel functions,
and thus is highly probable that the high 8-bit is occupied.
Therefore adds a new field in the monitor struct to store the pointer.
Change-Id: I7bcb34108c89a97cc38b2ac411ae4139b62786f3
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
() Adds board arduino_101, arduino_101_sss to sanity check.
This will build the tests against these two new boards
to catch issues.
() Updates existing sample apps to be arduino_101_sss instead of
quark_se_ss, due to renaming of boards.
Change-Id: Ic512728d2ce581539bc3ae4c9f6524d5bf01b296
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Warning comes during compilation about missing prompt, this sets
the prompt for this SoC.
Change-Id: If8b422d6a870eb99c219ab872924875eb04fba0c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Static function was declared after it was used.
Change-Id: I7872d9aedef34d0e1e68e6475bea8afcd0496f69
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
All patches should have Signed-off-by line in commit message as
described in doc/collaboration/code/changes.rst.
Change-Id: Iba6bad47115fd5323a096fa58c2d0d8c5ec9db75
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Use a default priority to avoid Kconfig blocking when priority
is not set in SoC or Board.
Change-Id: I4edda47b955a7ee834f04dc40d0decbd8dee6305
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This sample just prints 'Hello World', Nothing else.
Change-Id: I93af3fdc2de342e878bc038f937e7f1ad2231bd3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This sample is more than just a hello world, it demonstrates basic
kernel functionality that deserve to be its own sample.
A simplified Hello World sample will replace this one.
Change-Id: I9120daa1923f99def994e484783abe04db5b14eb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds a sample app to utilize the PWM on Arduino 101 via the pwm_dw
driver. Refer to the source file header for more information.
Change-Id: I0ad0f24242185b7b99e66445629d676ffde0bba3
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds a driver to utilize the DesignWare timer IP block
to do PWM.
Change-Id: I11ba689350b664209ad2440e3001e57eb38fd982
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change the terminology in the documentation and use board instead
of platform where applicable.
Change-Id: I812598e1948ee7df8739e5cc9029278e9e849c7f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
