Since the return value of these callbacks is a number of bytes ssize_t
is more appropriate than int.
Change-Id: I3406fb382975d62f51e7a195666d0ae88364fd2c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Base address registers and IRQs are set in Kconfig.
Set proper SPI default to various quark_se_ss based boards.
Change-Id: Iadaae551f441457bef334f94f68cafa7c3e499d0
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Though it's an ARC core, Quark SE SS does not follow the same registers
mapping as the official DesignWare document. Some parts are common, some
not.
Instead of bloating spi_dw.c with a lot of #ifdef or rewriting a whole
new driver though the logic is 99% the same, it's then better to:
- centralize common macros and definitions into spi_dw.h
- have a specific spi_dw_quark_se_ss_reg.h for register map, clock
gating and register helpers dedicated to Quark SE SS.
- have a spi_dw_regs.h for the common case, i.e. not Quark SE SS.
GPIO CS emulation and interrupt masking ends up then in spi_dw.h.
Clock gating is specific thus found in respective *_regs.h header.
Adding proper interrupt masks to quark_se_ss soc.h file as well.
One of the main difference is also the interrupt management: through one
line or multiple lines (one for each interrupt: rx, tx and error). On
Quark SE Sensor Sub-System it has been set to use multiple lines, thus
introducing relevant Kconfig options and managing those when configuring
the IRQs.
Quark SE SS SPI controller is also working on a lower level, i.e. it
requires a tiny bit more logic from the driver. Main example is the data
register which needs to be told what is happening from the driver.
Taking the opportunity to fix minor logic issues:
- ICR register should be cleared by reading, only on error in the ISR
handler, but it does not harm doing it anyway and because Quark SE SS
requires to clear up interrupt as soon as they have been handled,
introducing a clear_interrupts() function called at the and of the ISR
handler.
- TXFTLR should be set after each spi_transceive() since last pull_data
might set it to 0.
- Enable the clock (i.e. open the clock gate) at initialization.
- No need to mask interrupts at spi_configure() since these are already
masked at initialization and at the end of a transaction.
- Let's use BIT() macro when relevant.
Change-Id: I24344aaf8bff3390383a84436f516951c1a2d2a4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Quark SE development board provides an ARC core and thus requires a
board definition so developpers can flash this core as well.
Change-Id: I3612e3b0c4d7085af4fcf3fa1f6233849a05c8b4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
While we don't have a proper heap that can make use of all the
available RAM, make it possible for applications using Newlib to
configure the size of the heap exposed via the sbrk() hook.
Change-Id: I4e3193c1f2df0ace1dbc5b1f6ceb2cdc61479762
Signed-off-by: Iván Briano <ivan.briano@intel.com>
This patch adds the wiring information to spi_lsm9ds0 README so this
sample app can also be used in Quark D2000 CRB.
It also fixes the SDA pin from Quark SE Devboard since it was wrong.
Change-Id: I24d4df15186ef111f728a21f137246cf933a8222
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch fixes the QMSI SPI shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in spi_qmsi_init() because the macro QM_SPI_MST_1
and the function qm_spi_master_1_isr are not defined in QMSI headers
from Quark D2000.
Since this drivers is now properly working on Quark D2000, this patch
also sets the QMSI driver default options in arch/x86/soc/quark_d2000/
Kconfig.
Change-Id: Ic6e2f7f5a2c3f350ddf360b23ffab6b812948572
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This file is used by the git-review plugin to determine where to push
reviews and the branch to review against if different from master
Change-Id: I5b8109a8d2dfe8a1862c4209f0dfe667b2632557
Signed-off-by: Andrew Grimberg <agrimberg@linuxfoundation.org>
This patches removes 'CONFIG_WDT_DW=y' so we rely on the platform's
default option for the watchdog driver. This way the watchdog sample
application can be built for different platforms without changing
the configuration file.
Change-Id: I4fa0f8e1f34a4608d602b6a5120fa1818b94aa6a
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/watchdog/Kconfig because 1) most
of the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig (e.g. arch/x86/soc/quark_d2000/Kconfig).
For Quark D2000, the IRQ priority options (WDT_DW_IRQ_PRI and WDT_QMSI_
IRQ_PRI) values are set to '0' since the priority information is ignored
by the interrupt registering system (the interrupt vectors are fixed in
this SoC).
Change-Id: I8f36c0f0e56211cdee3f2c6fc90c7dcac0a1b5aa
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/rtc/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig (e.g. arch/x86/soc/quark_d2000/Kconfig).
For Quark D2000, the RTC_IRQ_PRI default value is set to '0' since the
priority information is ignored by the interrupt registering system
(the interrupt vectors are fixed in this SoC).
Change-Id: I70de889cfd22e65f0e7acf7e57ddc6439f028394
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
The name already set by the driver's Kconfig is correct, so overriding
it only causes confusion.
Change-Id: Ia6405786fdfdf103c922517c8140a07a9de387e0
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This patches removes 'CONFIG_GPIO_DW=y' and 'CONFIG_GPIO_DW_0=y' so
we rely on the platform's default options for the gpio driver. This
way the gpio sample application can be built for different platforms
without changing the configuration file.
Change-Id: I2480fee5fcd5463c39470c668c4438d83ecb786f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Add definition for ssize_t that may be useful to represent sizes with
variables that also need to be able to have negative values (e.g. to
represent errors).
Change-Id: I52ec69591ccfd760021dad38f5ba1b1ebe707ea5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The current value for RTC alarm has been a bit annoying during RTC tests
since we have to wait 10 seconds to verify that the RTC driver is working
properly. So this patch changes the alarm timeout to 1 second.
Change-Id: I2ef2aaeb13a4f53c8ab294ffedc198e8f3ba92a7
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch extends the gpio sample application so it can be used to test
GPIO functionality in Quark D2000 CRB.
Change-Id: I69fed701708a7268e1e5386a9dfde68fe6bb8160
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch fixes the GPIO QMSI shim driver so we are able to use it in
Quark D2000 based platforms. To enable this driver we have to add a few
#if guards because some macros and functions (e.g. QM_AON_GPIO_0 and
qm_aon_gpio_isr_0) are not defined in QMSI headers from Quark D2000
(this SoC doesn't support the Always-On GPIO controller).
This patch also adds the QMSI driver default options to arch/x86/soc/
quark_d2000/Kconfig.
Change-Id: Ia16a345e1de3008f167ed66f891834607c05f4a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This handling is already done by QMSI, so no need for it to be done in
Zephyr side as well.
Change-Id: Ia5c6206d3d7f04702e0be0e76f2130df8d60b31c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This adds support to the AON GPIO controller using the QMSI driver.
In order to enable it, the following configuration options must be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH TO LIBQMSI"
CONFIG_GPIO_QMSI=y
CONFIG_GPIO_QMSI_AON=y
Change-Id: I5a1a232d97741ad7fdbf40d8aea5a835e5b4e724
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This adds a NULL check against the reset vector for ARC.
If the reset vector is null, do not start the ARC core
as there is nothing to execute, and will probably cause
the whole SoC to stall.
Change-Id: I78d77b3e5940a205e05c13369f889cf9c5955487
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patches removes 'CONFIG_RTC_DW=y' so we rely on the platform's
default option for the RTC driver. This way the RTC sample application
can be built for different platforms without changing the configuration
file.
Change-Id: I88fc7cc2f072406c9d774a9b4682439df94f3bbc
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch changes both Quark SE and D2000 Kconfig files to enable the
WDT_DW driver by default if the WATCHDOG is enabled. This way, we keep
it consistent with the approach we already follow for others peripheral
drivers (GPIO, I2C, SPI).
Change-Id: I9d8b81c0e659b1408137deb71e33dacf6d4108c2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch changes both Quark SE and D2000 Kconfig files to enable the
RTC_DW driver by default if the RTC is enabled. This way, we keep it
consistent with the approach we already follow for others peripheral
drivers (GPIO, I2C, SPI).
Change-Id: I4910e501c105b6218d046080c47b1e7a42eced92
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch fixes the QMSI I2C shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in i2c_qmsi_init() because the macro QM_I2C_1
is not defined in QMSI headers from Quark D2000.
Since this drivers is now properly tested with Quark D2000, this patch
sets the QMSI driver default options in arch/x86/soc/quark_d2000/Kconfig.
It also adds the wiring information required to test the i2c_lsm9ds0
sample app in the Quark D2000 CRB.
Change-Id: I4be03c09304da5a66ac663e48b1d72225eb5651d
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
In case the I2C_QMSI driver is selected by the user, enable both I2C
contollers by default. This is the default behavior for I2C_DW driver
as well.
Change-Id: If3dc8eb0a266fde7f598f7b12370e5be903aafed
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch adds a new sample application to demonstrate how to use
I2C APIs. The application is very simple. It simply reads the 'WHO
AM I' register from the accelerometer in the LSM9DS0 chip and check
if it matches with the value described in the datasheet.
It also adds a README file which provides the wiring information
required to get the sample application working on Quark SE DevBoard.
Change-Id: I9162c030874c2718506b76519b255c9c11631802
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This file was updated and included in the nanokernel
primer information. It showcases the simple use of
nanokernel semaphores, timers and fibers.
Change-Id: Iaaa961eccf4f0df5d4c009d053b9d28e96c8d87d
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
bt_conn_lookup_handle() would be used in gatt.c to access conn's
discovery parameters.
Change-Id: Ibb494cf8af90ccab478fa7463a41942b06029539
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Store GATT discover parameters in bt_conn due to lack support from
NBLE RPC.
Change-Id: I47ade89b4861c9f1260ce3a3dc158d6344de334e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
User can now say "make BOARD=xxx NET_IFACE=802154" to compile
IEEE 802.15.4 support into the dtls server/client application.
The default is to compile for qemu and use slip.
Change-Id: I87f9b2d766cc5337a9c01c7657fb8d08d2d3e244
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Currently the packet is dropped if some other packet needs to
be sent instead. This does not make much sense in Zephyr so
activate packet queueing where the saved packet is sent later.
The queueing can happen e.g., with neighbor discovery where
the packet to be sent requires ND to be done before the actual
application packet is being sent.
Change-Id: Ia321d641eec5acfbc9f8f581de712801a483e32d
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If neighbor discovery is in use, then we do not need to do
various route etc setup. Normally ND needs to be active
but in some specific scenarios it can be turned off. One
such scenario is if an application is run inside qemu
which uses slip and host tun0 interface for communication,
in this case host typically do not activate ND for tun0
so we need to disable it also in zephyr side.
Change-Id: I8ac59990c5bbcdb06cca98bde7be3a0ad6e807a8
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Rename application init function to init_app() so that it is more
descriptive.
Change-Id: Id470756345c0bd10b103270115b26f3e8a281d17
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Use link local addresses instead of public IPv6 addresses
in the demo applications. This way the application do not
need to do any special setup.
Change-Id: I9aa817c388e3f673a6597801813dd1d0a8feb6b5
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If the user unsets CONFIG_NETWORKING_WITH_LOGGING, it will mean he
really doesn't want to get any network stack logging output.
Change-Id: I0629a045adbf8916327a8a9ba69b6e6e9ee2e7d9
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fixing this issue:
net/ip/l2_buf.c:81:31: note: in expansion of macro 'NULL'
#define inc_free_l2_bufs_func NULL
^
net/ip/l2_buf.c:88:2:
note: in expansion of macro
'inc_free_l2_bufs_func'
inc_free_l2_bufs_func(buf);
^
Change-Id: Ie58f23af479ec4f2dd625b1f0f36720bbe54f928
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Instead of manually creating bit shifts for individual bits use the
BIT() macro that exists for this purpose.
Change-Id: I599ecc16b3a2cffe8a355e19816c405e51937e91
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Including zephyr.h instead of microkernel.h will also bring in
sysgen.h, which may not be available at the time these files are used
during the build.
Change-Id: I5e9e33a06a5877c6077bceebbab1bee6479fddc0
Signed-off-by: Iván Briano <ivan.briano@intel.com>
() Add brief descriptions for #defines.
() Hides internal only API typedefs and struct.
Change-Id: I452c5d7fe56d57ba05338639986e2fff44a89244
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
