- help message should have same intendation on a specific file
- No need of "depends on" if it's already in a relevant if/endif
- either prompt is used, or not, but let's not mix.
Change-Id: Ib75f25dcf2440fd0ba7bde5c95bc1fbece68be07
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Currently running "make V=1 flash/debug" does not result in the caller
discovering what commands are run to perform the action because make
calls into an opaque script (which then makes complex invokations of
both openocd and gdb). Make the script more transparent by conditionally
enabling enabling tracing within the script.
We also remove the "Done flashing" message. It is pointless because
openocd has already *told* us it has done flashing ["wrote 16384 bytes
from file .../zephyr.elf in 0.802135s (19.947 KiB/s)"]. It is also
potentially misleading since it tells us we are "Done flashing" even
when we failed to flash anything which risks misleading someone
unfamiliar with openocd.
Change-Id: Icaea28c4b00ac10965726dd4502162b7de080953
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Generate a test report using junit/xunit format with all details and
logs that can be published on the web to show results from a sanitycheck
run.
Output is stored in scripts/sanity_chk/ alongside the CSV file.
Change-Id: I5ea6f409c1f86f408eeae870b90a953e71046da9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
console_getchar() returns a u8_t so we need to include the definition
of that to avoid compilation errors.
Change-Id: I1f16ce7942c90555463417e23a60eaa34cb091f4
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Found out that the SAM3 series is not a single series. There are actully
3 different series, 3U, 3A, and 3X.
Origin: Original
Jira: ZEP-2067
Change-Id: I61cdc826cc32dbdd25b5e6bafaada062c8ae8417
Signed-off-by: Justin Watson <jwatson5@gmail.com>
Typo in :ref:`hello_world` (regular quote vs. back tick)
Change-Id: I77853f85b9c71751307ef105b6babcb0cfbc9060
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Incorrect quoting left a :option: inline tag in the generated output
Change-Id: Iab2e4be692e138cf01f1cc276e830b2cb0e41b03
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Historically, space for struct k_thread was always carved out of the
thread's stack region. However, we want more control on where this data
will reside; in memory protection scenarios the stack may only be used
for actual stack data and nothing else.
On some platforms (particularly ARM), including kernel_arch_data.h from
the toplevel kernel.h exposes intractable circular dependency issues.
We create a new per-arch header "kernel_arch_thread.h" with very limited
scope; it only defines the three data structures necessary to instantiate
the arch-specific bits of a struct k_thread.
Change-Id: I3a55b4ed4270512e58cf671f327bb033ad7f4a4f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Moved the Atmel SAM 3 from its own directory into
the directory tree laid out in arch/arm/soc/atmel_sam.
Origin: Original
Jira: ZEP-2067
Change-Id: I26a1a521dd7caa607c3e95a06cd574ee68ca59b8
Signed-off-by: Justin Watson <jwatson5@gmail.com>
This SoC, in its default configuration, does not have any SW IRQ below
the EXCM level. This make it unsuitable to use irq_offload() and thus
almost untestable.
Decision was made to remove this configuration in favorof custom one
XRC_D2PM_5swIrq, which is the same core but with additional 4 SW IRQs
of level 1 and an additional timer.
Issue: ZEP-2029
Change-Id: Iee4f8346aa9d610e14898444f78d28ef0ac4cef2
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
Install gitlint using pip:
# pip install gitlint
# gitlint install-hook
This will install the pre-commit hook.
Policies are define in .gitlint. Custom rules are available under
scripts/gitlint.
This script will also run in CI, so avoid CI errors by using the hook
above.
Change-Id: I62750a1fd9369341db29c413a6c4a1677bb0db8a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To speed up builds, this change allows building the needed host tools
that are built for every application and stores them un
${ZEPHYR_BASE}/bin.
Run 'make host-tools' and then define PREBUILT_HOST_TOOLS to reuse the
host tools across multiple builds.
$ make host-tools
HOSTCC scripts/basic/fixdep
HOSTCC scripts/gen_idt/version.o
HOSTCC scripts/gen_idt/gen_idt.o
HOSTLD scripts/gen_idt/gen_idt
HOSTCC scripts/gen_offset_header/gen_offset_header.o
HOSTLD scripts/gen_offset_header/gen_offset_header
HOSTCC scripts/kconfig/conf.o
SHIPPED scripts/kconfig/zconf.tab.c
SHIPPED scripts/kconfig/zconf.lex.c
SHIPPED scripts/kconfig/zconf.hash.c
HOSTCC scripts/kconfig/zconf.tab.o
HOSTLD scripts/kconfig/conf
$ export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
$ make -C samples/hello_world
Now you will notice a speedup when building the application!
Change-Id: Ie0aeee7f9a60b1fd49e7e32d78601f03473d73b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Change-Id: I9ccb7c01a7d8c4ad8b1e55a1b45622aad2a57e57
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch contains a MPU test with a set of options to check
the correct MPU configuration against the following security
issues:
* Read at an address that is reserved in the memory map.
* Write into the boot Flash/ROM.
* Run code located in SRAM.
The MPU test application uses the Zephyr shell.
Change-Id: Ib40dc76b082b800884fd636a1509a0712227d681
Signed-off-by: Marc Moreno <marc.morenoberengue@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the ST nucleo_f411re board based on
STM32F401XE.
Change-Id: I43aae0930ccabe234fcb34216518b568a855a1be
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the ST nucleo_f401re board based on
STM32F401XE.
Change-Id: I5e8042c1f964827980b974a565a4d4666eeccf3b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds MPU support to the 96 boards Carbon board based on
STM32F401XE.
Change-Id: I8444318099a665133488ccdd5ba129c805f9a20e
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds initial MPU support to STM32F401XE.
The boot configuration prevents the following security issues:
* Prevent to read at an address that is reserved in the memory map.
* Prevent to write into the boot Flash/ROM.
* Prevent the application to access to the BootROM.
* Prevent from running code located in SRAM.
Change-Id: I4dc0669009bd5c0a829a69f8ff417c787b7043ed
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables MPU by default into the V2M Beetle port of Zephyr.
Change-Id: Iab2dea748c68a6932eb31e746d1a9cdb07808683
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds initial MPU support to ARM Beetle.
The boot configuration prevents the following security issues:
* Prevent to read at an address that is reserved in the memory map.
* Prevent to write into the boot Flash/ROM.
* Prevent from running code located in SRAM.
Change-Id: I64f1001369896fffb0647de6be605a95161c4695
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds an initial driver for the ARM MPU.
This driver has been tested on ARM Beetle and STM32F4.
Change-Id: I2bc4031961ec5a1d569929249237646f4a349f16
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch add the Memory Protection Unit parameter to the arm core
configuration.
Change-Id: Ifee8cdd5738391a6f182e8d0382d27eeb8c546ba
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Marc Moreno <marc.morenoberengue@linaro.org>
This patch adds the regions for the mpu configuration to the soc.h file.
Change-Id: Ifd1ce96eeb4731ae01f5171924af92b9e236a3dc
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Marc Moreno <marc.morenoberengue@linaro.org>
The current PLL settings for the Carbon have two problems.
1. The VCO frequency (672MHz) is out of spec.
2. The 48MHz clock is being driven at 84MHz which breaks USB,
breaks SDIO and also risks biasing the RNG.
Fix this by bringing the VCO down to 336MHz (which also fixes
the 48MHz clock) and update the other dividers accordingly.
Change-Id: I394c476a8b27f027da5cdc31992613b376cf6aff
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
This patck adds the stack information into the k_thread data structure.
The information will be set by when creating a new thread (_new_thread)
and will be used by the scheduling process.
Change-Id: Ibe79fe92a9ef8bce27bf8616d8e0c878508c267d
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
When calling scripts/gen_idt, if we don't have $ZEPHYR_BASE/scripts in
the path, it will fail, so we can call it with its full path to avoid
such need.
Change-Id: I47b340c9f3204ad8740c29e663e12082208bb13b
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Initial version of some document to capture the secure coding
practices used in the Zephyr project.
Signed-off-by: David Brown <david.brown@linaro.org>
Change-Id: Ic20546a7af832dc7bd193eb91ed44f1badc3ab87
This sample application uses the kernel system logger already present
in Zephyr and publishes events through the SEGGER RTT protocol, so it's
available by the SEGGER SystemView application.
[1] https://www.segger.com/systemview.html?p=1731
Jira: ZEP-1463
Change-Id: If1eba4644b95175660b3040bdc4b2717b2cfc9ad
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These libraries allow publishing information to enable system profiling
when using the SEGGER SystemView tool. This tool provides a way to record
and visualize events such as threads scheduling, interrupts, and can help
find unintended interactions and resource conflicts. More information can
be obtained from SEGGER website at [1], including downloads for major
platforms.
[1] https://www.segger.com/systemview.html?p=1731
Jira: ZEP-1463
Origin: https://www.segger.com/systemview.html?p=1731
Change-Id: I04f5897690089dc8a8fb4ae60726fe3a022b7a30
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This adds a new event type to the kernel event logger that tracks
thread-related events: being added to the ready queue, pending a
thread, and exiting a thread.
It's the only event type that contains "subevents" and thus has a
non-void parameter in their respective _sys_k_event_logger_*()
function. Luckily, as isn't the case with other events (such as IRQs
and thread switching), these functions are called from
platform-agnostic places, so there's no need to worry about changing
the assembly guts.
This is the first patch in a series adding support for better real-time
profiling of Zephyr applications.
Jira: ZEP-1463
Change-Id: I6d63607ba347f7a9cac3d016fef8f5a0a830e267
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Document the flash latency values by copying the relevant tables
from the reference manuals for each MCU.
Change-Id: Ieb2824ffd7634d917399e3e62146d9243b527f44
Signed-off-by: Christer Weinigel <christer@weinigel.se>
Fix misspellings in Kconfig help text and made spelling of
RX and TX consistent (from reviewer comments)
Change-Id: Ie9d4c3863cd210e7a17b50a85a7e64156b6bf3d7
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
If the flash latency isn't set most STM32F4xx MCU's won't be able
to run from flash when the CPU frequency is changed. Make this a
compile time error instead of an assert at runtime.
Change-Id: Ic3421194545f8f83bd6e00f0cd011306c8d1eedd
Signed-off-by: Christer Weinigel <christer@weinigel.se>
We want to show that if a non-essential thread gets a fatal exception,
that thread gets aborted but the rest of the system works properly.
We also test that k_oops() does the same.
Issue: ZEP-2052
Change-Id: I0f88bcae865bf12bb91bb55e50e8ac9721672434
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Put the reason code in r0 and make a SVC #2 call, which will be
propagated to _fatal_error_handler as an exception.
The _is_in_isr() implementation had to be tweaked a bit. User-generated
SVC exception no longer just used for irq_offload(); just because we are
in it does not mean we are in interrupt context. Instead, have the
irq_offload code set and clear the offload_routine global; it will be
non-NULL only if it's in use. Upcoming changes to support memory
protection (which will require system calls) will need this too.
We free up some small amount of ROM deleting _default_esf struct as it's
no longer needed.
Issue: ZEP-843
Change-Id: Ie82bd708575934cffe41e64f5c128c8704ca4e48
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We reserve a specific vector in the IDT to trigger when we want to
enter a fatal exception state from software.
Disabled for drivers/build_all tests as we were up to the ROM limit
on Quark D2000.
Issue: ZEP-843
Change-Id: I4de7f025fba0691d07bcc3b3f0925973834496a0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Unlike assertions, these APIs are active at all times. The kernel will
treat these errors in the same way as fatal CPU exceptions. Ultimately,
the policy of what to do with these errors is implemented in
_SysFatalErrorHandler.
If the archtecture supports it, a real CPU exception can be triggered
which will provide a complete register dump and PC value when the
problem occurs. This will provide more helpful information than a fake
exception stack frame (_default_esf) passed to the arch-specific exception
handling code.
Issue: ZEP-843
Change-Id: I8f136905c05bb84772e1c5ed53b8e920d24eb6fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is needed by application code that wants to print formatted
strings, but only has a fmt and va_list, and lacks memory to spare for
"buf" and something like:
vsnprintk(buf, sizeof(buf), fmt, ap);
printk("%s", buf);
Change-Id: Ic9cc915ec7e5f8f9492c730667f39788ecae65f6
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
GCC supports __attribute__((format (printf ...))) even when the
variadic arguments are not present. In this case, the attribute
argument specifying the start of the variadic arguments should be
zero.
Use this in printk.h to add __printf_like where it's missing.
Change-Id: I7868439d5791e391aeb07356af9819524e68c771
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The ICSR RETTOBASE bit is improperly implemented in QEMU (the polarity
is flipped) and the fix for it has not yet made it into a QEMU release,
although it is present in upstream master branch.
The symptom is that if we are not in thread mode, the system always
believes were are in a nested exception state, causing _IsInIsr() to
always return true.
Skip the nested exception check if we are building for QEMU.
This is a workaround until SDK-54 is resolved.
Issue: SDK-54
Change-Id: I06eafcc85fb76a9b23b4ba85ed6e111a08516231
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For exceptions where we are just going to abort the current thread, we
need to exit handler mode properly so that PendSV can run and perform a
context switch. For ARM architecture this means that the fatal error
handling code path can indeed return if we were 1) in handler mode and
2) only wish to abort the current thread.
Fixes a very long-standing bug where a thread that generates an
exception, and should only abort the thread, instead takes down the
entire system.
Issue: ZEP-2052
Change-Id: Ib356a34a6fda2e0f8aff39c4b3270efceb81e54d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
