Commit graph

41120 commits

Author SHA1 Message Date
Luiz Augusto von Dentz
72b05f3e17 Bluetooth: tests: Add tests for UUID APIs
This adds initial test for UUID APIs.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-06-24 22:36:59 +02:00
Luiz Augusto von Dentz
5846a36e9c Bluetooth: hci_prop_evt: Don't set NO_QEMU_SERIAL_BT_SERVER
It should no longer be needed to set NO_QEMU_SERIAL_BT_SERVER manually
when setting CONFIG_BT_NO_DRIVER.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-06-24 22:36:59 +02:00
Luiz Augusto von Dentz
769cfab694 cmake: Set NO_QEMU_SERIAL_BT_SERVER when CONFIG_BT_NO_DRIVER is set
When not driver is selected there should be no need to have a serial
attached.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-06-24 22:36:59 +02:00
Ioannis Glaropoulos
0180b94afd tests: kernel: fatal: add explicit test case for ARM and FP Sharing mode
For the ARM architecture we would like to test the HW
Stack Protection feature when building with support for
FP shared registers mode (CONFIG_FP_SHARING=y), as a
means of increasing coverage.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 13:26:47 -07:00
Henrik Brix Andersen
70c47cba04 tests: drivers: can: stm32: determine CAN device at compile-time
Determine the CAN device (CAN_0 or CAN_1) at compile-time.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
a361d7caad samples: drivers: CAN: add support for twr_ke18f board
Add support for the NXP TWR-KE18F developement board to CAN sample.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
348ef0f2a4 boards: twr_ke18f: enable CAN controller
Enable CAN bus controller on the NXP TWR-KE18F development board.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
52cfe30d5e soc: nxp: ke1xf: add CAN support
Add support for the FlexCAN controllers found in the NXP Kinetis KE1xF
SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
b5e3be9e8a soc: arm: nxp: ke1xf: enable MCUX SCG clock controller driver
Enable the MCUX SCG clock controller driver by default for the NXP
Kinetis KE1xF SoC series. Move the generic CLKOUT configuration from
SoC to the clock controller driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
13847a315d drivers: clock_control: mcux_scg: add NXP MCUX SCG clock control driver
Add clock controller driver for the NXP Kinetis System Clock Generator
(SCG) clock module.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
652fdfe3a1 drivers: can: add support for the NXP Kinetis FlexCAN controller
Add MCUX driver shim for the NXP Kinetis FlexCAN CAN bus controller.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
dded1d076a dts: can: allow individual specification of prop seg and phase seg1 quanta
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
d2f5a2c1dc tests: drivers: can: api: add support for CAN_0
Add support for using CAN_0 interface in the CAN API tests.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
64a9a04500 drivers: can: add support for two CAN controller instances
Add support for two CAN bus controller instances and disable both of
them by default. Enable CAN_1 for the STM boards currently supporting
CAN.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Ulf Magnusson
a570b40252 genrest: De-spam docs by skipping direct deps. in more places
Similar deal to commit cc14c40a2d ("kconfiglib: Unclutter symbol
strings, avoid redundant writes, misc.").

Hide the direct dependencies in the defaults, selects, and implies
sections. Do the same in menuconfig/guiconfig as well.

This uses a new Kconfiglib API, so update Kconfiglib to upstream
revision 164ef007a8. This also includes some minor optimizations and
cleanups.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-06-24 12:14:06 -07:00
Nicolas Pitre
465b2cf31b mempool: fix corruption of the free block bitmap and beyond
In z_sys_mem_pool_block_alloc() the size of the first level block
allocation is rounded up to the next 4-bite boundary. This means one
or more of the trailing blocks could overlap the free block bitmap.

Let's consider this code from kernel.h:

  #define K_MEM_POOL_DEFINE(name, minsz, maxsz, nmax, align) \
       char __aligned(align) _mpool_buf_##name[_ALIGN4(maxsz * nmax) \
                              + _MPOOL_BITS_SIZE(maxsz, minsz, nmax)]; \

The static pool allocation rounds up the product of maxsz and nmax not
size of individual blocks. If we have, say maxsz = 10 and nmax = 20,
the result of _ALIGN4(10 * 20) is 200. That's the offset at which the
free block bitmap will be located.

However, because z_sys_mem_pool_block_alloc() does this:

        lsizes[0] = _ALIGN4(p->max_sz);

Individual level 0 blocks will have a size of 12 not 10. That means
the 17th block will extend up to offset 204, 18th block up to 216, 19th
block to 228, and 20th block to 240. So 4 out of the 20 blocks are
overflowing the static pool area and 3 of them are even located
completely outside of it.

In this example, we have only 20 blocks that can't be split so there is
no extra free block bitmap allocation beyond the bitmap embedded in the
sys_mem_pool_lvl structure. This means that memory corruption will
happen in whatever data is located alongside the _mpool_buf_##name
array. But even with, say, 40 blocks, or larger blocks, the extra bitmap
size would be small compared to the extent of the overflow, and it would
get corrupted too of course.

And the data corruption will happen even without allocating any memory
since z_sys_mem_pool_base_init() stores free_list pointer nodes into
those blocks, which in turn may get corrupted if that other data is
later modified instead.

Fixing this issue is simple: rounding on the static pool allocation is
"misparenthesized". Let's turn

	_ALIGN4(maxsz * nmax)

into

	_ALIGN4(maxsz) * nmax

But that's not sufficient.

In z_sys_mem_pool_base_init() we have:

        size_t buflen = p->n_max * p->max_sz, sz = p->max_sz;
        u32_t *bits = (u32_t *)((u8_t *)p->buf + buflen);

Considering the same parameters as above, here we're locating the extra
free block bitmap at offset `buflen` which is 20 * 10 = 200, again below
the reach of the last 4 memory blocks. If the number of blocks gets past
the size of the embedded bitmap, it will overlap memory blocks.

Also, the block_ptr() call used here to initialize the free block linked
list uses unrounded p->max_sz, meaning that it is initially not locating
dlist nodes within the same block boundaries as what is expected from
z_sys_mem_pool_block_alloc(). This opens the possibility for allocated
adjacent blocks to overwrite dlist nodes, leading to random crashes in
the future.

So a complete fix must round up p->max_sz here too.

Given that runtime usage of max_sz should always be rounded up, it is
then preferable to round it up once at compile time instead and avoid
further mistakes of that sort. The existing _ALIGN4() usage on p->max_sz
at run time are then redundant.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-24 12:10:09 -07:00
Ioannis Glaropoulos
639eb76729 arch: arm: make priv stack guard programming similar to normal guard
This commit aligns the programming of the privileged stack MPU
guard with that of the default stack guard (i.e of supervisor
threads). In particular:
- the guard is programmed BELOW the address indicated in
  arch.priv_stack_start; it is, therefore, similar to the
  default guard that is programmed BELOW stack_info.start.
  An ASSERT is added to confirm that the guard is programmed
  inside the thread privilege stack area.
- the stack fail check is updated accordningly
- arch.priv_stack_start is adjusted in arch_userspace_enter(),
  to make sure we account for a (possible) guard requirement,
  that is, if building with CONFIG_MPU_STACK_GUARD=y.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Ioannis Glaropoulos
f15c12d482 arch: arm: expose start/end limits of the thread priv stack section
We introduce linker symbols to hold the start and end address of
the memory area holding the thread privilege stack buffers,
applicable when building with support for User Mode.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Ioannis Glaropoulos
88959e75dd scripts: gen_priv_stacks.py: use the right alignment for priv stacks
The privilege stacks are not sandboxed inside an MPU region,
so they do not have to be aligned with the stack buffer size.
We fix this by using the PRIVILEGE_STACK_ALIGN macro, which
is defined in arch.h and reflects the minimum alignment
requirement for privilege stack buffers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Ioannis Glaropoulos
723aae9503 tests: kernel: mem_protect: use correct define for MEM_REGION_ALLOC
For ARM architecture, use Z_THREAD_MIN_STACK_ALIGN to define
MEM_REGION_ALLOC in tests/kernel/mem_protect/mem_protect/.
STACK_ALIGN takes into account MPU stack guard alignment
requirements. However, application memory partitions do not
require MPU stack guards, therefore, the alignment requirements
are not applicable here.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Ioannis Glaropoulos
518bfa39e3 arch: arm: introduce macro to describe the privilege stack alignment
We introduce a new define to describe the alignment for a
privilege stack buffer. This macro definition is used by the
privilege stack generation script, to determine the required
alignment of threads' privilege stacks when building with
support for user mode.

We cannot use Z_THREAD_MIN_STACK_ALIGN in this case, because
the privilege stacks do not need to respect the minimum MPU
region alignment requirement, unless, of course, this is
enforced via the MPU Stack Guard feature.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Ioannis Glaropoulos
e0db39447b arch: arm: re-organize thread stack macro defines in arch.h
This commit re-organizes the macro definitions in arch.h for
the ARM architecture. In particular, the commit:
- defines the minimum alignment requirement for thread stacks,
  that is, excluding alignment requirement for (possible)
  MPU stack guards.
- defines convenience macros for the MPU stack guard align and
  size for threads using the FP services under Shared registers
  mode (CONFIG_FP_SHARING=y). For that, a hidden Kconfig option
  is defined in arch/arm/core/cortex_m/mpu/Kconfig.
- enforces stack alignment with a wide MPU stack guard (128
  bytes) under CONFIG_FP_SHARING=y for the ARMv7-M architecture,
  which requires start address alignment with power-of-two and
  region size.

The commit does not change the amount of stack that is reserved
with K_THREAD_STACK_DEFINE; it only determines the stack buffer
alignment as explained above.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-24 10:16:57 -07:00
Charles E. Youse
ef736f77c2 arch/x86: relocate and rename SYS_X86_RST_* constants
These constants do not need global exposure, as they're only
referenced in the reboot API implementation. Also their names
are trimmed to fit into the X86-arch-specific namespace.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-24 07:46:24 -07:00
Charles E. Youse
4bdbd879ef arch/x86: remove old PRINTK() debugging macro
This appears to date all the way back to the initial import
and is used in exactly one place if DEBUG is on. Removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-24 07:46:24 -07:00
Charles E. Youse
2835c22985 arch/x86: used fixed initial EFLAGS on thread creation
Previously the existing EFLAGS was used as a base which was
then manipulated accordingly. This is unnecessary as the bits
preserved contain no useful state related to the new thread.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-24 07:46:24 -07:00
Charles E. Youse
01b572937b arch/x86: remove CR4_PAE_DISABLE mask
This is never used. The value is incorrect, in any case.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-24 07:46:24 -07:00
Jukka Rissanen
034bccca20 net: Fix net_pkt_hexdump() to print pkt address properly
If immediate logging is disabled, then we must use log_strdup()
when printing log string allocated from stack.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-06-24 16:44:02 +03:00
Kumar Gala
0a99f53c80 sensor: lis2dh: Use general DT_<COMPAT>_BUS_<BUS> define.
Match what other drivers are doing and use the general BUS define.
Change DT_ST_LIS2DH_0_BUS_SPI to DT_ST_LIS2DH_BUS_SPI

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:28:19 -05:00
Erwan Gouriou
9f857c3ba8 soc: stm32f3: Delete obsolete FLASH_PAGE_SIZE Kconfig symbol
Definition of obsolete FLASH_PAGE_SIZE Kconfig symbol was
remaining in STM32F3 soc files.
Clean these.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-06-24 07:23:11 -04:00
Kumar Gala
f20d2b6f41 drivers: rv32m1: remove bogus IRQ_PRI related defines
The defines related to IRQ priority don't exist and aren't used.  So
just pass 0 to IRQ_CONNECT for the priority field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:22:27 -04:00
Derek Hageman
59786b43b3 drivers: sam0: Fix deprecated instance macro usage
During conversion in #16815 a few device tree instance macro aliases
where missed (probably due to them existing to support future SoCs
and so not currently compiled), this fixes their usage.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-06-24 07:21:26 -04:00
Derek Hageman
4c27e5b72e drivers: sam0: Fix deprecated IRQ macro usage
During conversion in #16937 a few IRQ macro aliases where missed
(probably due to lack of enabled test cases that compile them),
this fixes their usage.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-06-24 07:21:26 -04:00
Kumar Gala
2ee674fe32 board: mps2_an385: Remove board.h
The defines in board.h aren't used/buildable so lets remove it.  If
someone wants to support the button/led samples they can add DTS support
for those items.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:20:31 -04:00
Marcin Niestroj
a3b363e1ce doc: shell: document Ctrl+N and Ctrl+P meta-keys
Document bash and emacs-like way of navigating history in shell.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-06-24 07:17:53 -04:00
Marcin Niestroj
0d6fabe6c3 shell: add Ctrl+N and Ctrl+P meta-keys
Ctrl+N - moves in history to next entry
Ctrl+P - moves in history to previous entry

Behavior of those meta-keys is the same as in bash and emacs, which
makes Zephyr shell even more familiar to play with.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-06-24 07:17:53 -04:00
Kumar Gala
74818bcb49 scripts/dts: Treat array always as a list
If the type of property is a 'array' we should generate defines as
if its a list even if theres only a single element in the list.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-24 07:16:59 -04:00
Luiz Augusto von Dentz
3408bfe211 Bluetooth: shell: gatt: Add discover command
This adds discover command which can be used to discover all attributes
using BT_GATT_DISCOVER_ATTRIBUTE:

uart:~$ gatt discover
Discover pending
Descriptor 2800 found: handle 1
Descriptor 2803 found: handle 2
Descriptor 2a00 found: handle 3
Descriptor 2803 found: handle 4
Descriptor 2a01 found: handle 5
Descriptor 2800 found: handle 6
Descriptor 2803 found: handle 7
Descriptor 2a05 found: handle 8
Descriptor 2902 found: handle 9
Descriptor 2803 found: handle a
Descriptor 2b29 found: handle b
Descriptor 2803 found: handle c
Descriptor 2b2a found: handle d
Descriptor 2803 found: handle e
Descriptor 2b2b found: handle f

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-06-24 12:16:49 +02:00
Luiz Augusto von Dentz
eb8abda6b0 Bluetooth: GATT: Fix bt_gatt_discovery with BT_GATT_DISCOVER_DESCRIPTOR
Fix iterating past the response which causes an invalid memory to be
accessed and passed over to the callback as if there were more
attributes found.

Fixes #16602

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2019-06-24 12:16:49 +02:00
Nicolas Pitre
1fd379da44 log_msg test: rework test_log_std_msg() to better cope with 64-bit builds
Remove #ifdef's and use a loop to avoid duplicating the code.

Suggested by Krzysztof Chruscinski.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-24 08:58:52 +02:00
Nicolas Pitre
6987937582 log facility: make its records 64-bit compatible
Log records may store either data or pointers to more records. In both
cases they must have the same size. With 64-bit pointers, the amount
of data that can occupy the same space as a pointer has to be adjusted.
And storage alignment has to accommodate actual pointers not u32_t.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-24 08:58:52 +02:00
Nicolas Pitre
0567f161d8 log facility: make its arguments 64-bit compatible
Log arguments were hardcoded to u32_t values. On 64-bit systems, this
is rather restrictive. To make things clear, arguments now have their
own type, log_arg_t, which now can be adjusted in only one location
if need be.  It is currently defined as unsigned long whose effective
width is equivalent to u32_t on 32-bit systems, and u64_t on 64-bit
systems.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-24 08:58:52 +02:00
Kumar Gala
344737d759 scripts/dts: Treat string-list always as a list
If the type of property is a 'string-list' we should generate defines as
if its a list even if theres only a single element in the list.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-22 10:03:17 -05:00
Kumar Gala
2910b5eac1 tests/kernel/context: Fix TICK_IRQ define for RV32M1 lptmr_timer
We missed converting DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ to
DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ_0.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 16:17:05 -05:00
Marc Herbert
35dc96399c sanitycheck: show handler_time in -v output (qemu 2.032s)
We already have the info so let's show it. This helps spots intermittent
issues[*], gives an indication of the time --build-only saves, can help
spot an overloaded test system, highlights the most time-consuming tests
which may need a longer timeout in their config, shows the effective
timeout value when one occurs... all this for a dirt cheap screen estate
price and two extra lines of code.

Sample -v output:

32/81 board123  tests/testme              PASSED (qemu 2.049s)
33/81 board456  samples/hello             PASSED (build)
34/81 qemu_x3   tests/kernel.stack.usage  FAILED: timeout (qemu 60.029s)
     see: sanity-out/qemu_x3/tests/kernel.stack.usage/handler.log
35/81 board456  tests/testme              PASSED (build)
36/81 qemu_x5   tests/kernel.queue        FAILED: failed (qemu 2.191s)
     see: sanity-out/qemu_x5/tests/kernel.queue/handler.log

[*] running qemu in heavily packed cloud virtual machines comes to mind,
    also see #12553, #14173 etc.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-06-21 13:47:32 -04:00
Andrei Gansari
58e05ddcc1 drivers: uart for LPC devices interrupt enabled
NXP's MCU LPC families uart interrupt was enabled.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-06-21 11:24:09 -05:00
Kumar Gala
bf0f6d911d dts: Add concept of sub-nodes to YAML and generator
Several bindings have an expectation of sub-nodes that describe the
actual infomation.  The sub-nodes don't have any compatiable so we can't
key on that.

So we can add the concept of a sub-node to the YAML to handle cases like
'gpio-keys', 'gpio-leds', 'pwm-leds', etc..

The sub-node in the YAML is effective the "binding" params that describe
what properties should exist in the sub-node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 15:34:28 +02:00
Kumar Gala
a52df691d1 drivers/i2c_rv32m1_lpi2c: Remove accidently added debug code
Some stray debug code that causes a build error got added, remove it so
things build propertly.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 08:17:57 -05:00
Kumar Gala
fe2062b38b dts/extract: deprecate old IRQ alias define generation
Make the old IRQ aliases that where missing the _0, _1, etc. part as
deprecated.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00
Kumar Gala
dba65ce47c drivers: Update DT IRQ alias defines
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00
Kumar Gala
7b638bf3f6 dts/extract: Fix IRQ alias define generation
The alias generation wasn't doing the right thing with regards to
keeping the names consistent.  We would drop the index from the define
name for aliases.

So we'd get
	DT_NXP_KINETIS_GPIO_GPIO_D_IRQ
which should be
	DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:53:05 -05:00