Stack sentinel doesn't prevent corruption, it just notices when
it happens. Any memory could be in a bad state and it's more
appropriate to take the entire system down rather than just kill
the thread.
Fatal testcase will still work since it installs its own
_SysFatalErrorHandler.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
- _SysFatalErrorHandler is supposed to be user-overridable.
The test case now installs its own handler to show that this
has happened properly.
- Use TC_PRINT() TC_ERROR() macros
- Since we have out own _SysFatalErrorHandler, show that
k_panic() works
- Show that _SysFatalErrorHandler gets invoked with the expected
reason code for some of the scenarios.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fixes an issue where if a thread calls k_panic() or k_oops()
with interrupts locked, control would return to the thread
and it would only be aborted after interrupts were unlocked
again.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
One of the stack sentinel policies was to check the sentinel
any time a cooperative context switch is done (i.e, _Swap is
called).
This was done by adding a hook to _check_stack_sentinel in
every arch's __swap function.
This way is cleaner as we just have the hook in one inline
function rather than implemented in several different assembly
dialects.
The check upon interrupt is now made unconditionally rather
than checking if we are calling __swap, since the check now
is only called on cooperative _Swap(). The interrupt is always
serviced first.
Issue: ZEP-2244
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The Sam3x HAL defines __NVIC_PRIO_BITS to 4.
Fixes an issue where interrupt priorities and masking
were not being done correctly.
Issue: ZEP-2243
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The sample app "static_lib" is very important to Zephyr user, which
demonstrate how to build and link a static lib.
ISSM team wanted to integrate this app in their IDE for quark platforms.
However they find the in "static_lib/hello_world/Makefile" BOARD is
hardcoded as qemu_x86.
This patch supports other BOARD passed from build command.
I have verified this app working fine @Arduino101.
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
This patch adds a condition on the FLASH_LOAD_OFFSET and FLASH_LOAD_SIZE
to make them conditionally excluded if HAS_DTS is enabled. FLASH
partition information must be defined for all DTS platforms which
utilize flash.
For DTS enabled platforms, CONFIG_FLASH_LOAD_OFFSET and
CONFIG_FLASH_LOAD_SIZE will be generated from the flash information
defined in the DTS file. The values used for these variables will be
determined by the zephyr,code-partition chosen node. If no chosen
node is specified, the zephyr,flash chosen node will be used.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The hard-coded value of 10ms doesn't take the system configured
amount of ticks per second, nor does it account for an unlucky
tick advance which causes the test to fail very intermittently
in QEMU.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
fixed literalinclude warning that referenced beyond end of file and
added lineno-start option to show correct line number of included file
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commit fixes the compilation error that occurs if both UART
ports on the FE310 SoC are enabled. The error occurs due to the
missing function definition of uart_fe310_irq_cfg_func_1 .
Signed-off-by: Jens Peter Schroer <jens@manetos.com>
The REGION bits (bit[3:0]) of MPU_RBAR register can specify the number
of the region to update if the VALID bit (bit[4]) is also set.
If the bit[3:0] of "region_addr" are not zero, might cause to update
unexpected region. This could happen since we might not declare stack
memory with specific alignment.
This patch will mask the bit[4:0] of "region_addr" to prevent updating
unexpected region.
Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
When checking for line length limits, ignore lines with Signed-off-by.
Some developers have a long name that would not fit within the limits.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When src and dst addresses are compressed based on context
information, uncompression method should verify CID bit,
SAC and DAC bits and context ID's. But it has missed some
cases which resulted in invalid uncompressed IPv6 header.
e.g. CID is set, SAC is 0 and DAC is 1 and context id's provided.
Uncompression method assumed that src address is compressed based
on context information but it is not.
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
Empty RPL HBH header will be inserted while finalizing IPv6 packet
but updated after finding nexthop and sent the packet. In case of
Bluetooth or multicast dst address it was missed. Resulted in
empty RPL HBH header and packet dropped at peer node. It should
be updated in all circumstances.
Jira: ZEP-2088
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
The mbedtls debugging function was set before the ssl config
struct was initialized. This meant that it was not possible
to activate mbedtls debug prints. This commit sets the debug
print option after the config struct has been initialized.
Fixed also the debug prints which print extra \n which looks
very bad in debugging outputs.
This commit does not enable mbedtls debugging, it just makes it
possible to output mbedtls debug prints. In order to get mbedlts
debug prints one needs to do this:
* set DEBUG_THRESHOLD to >0 in http_server.c
* enable CONFIG_NET_DEBUG_HTTP in project config file
* enable MBEDTLS_DEBUG_C in mbedtls config file (see file pointed
by CONFIG_MBEDTLS_CFG_FILE option)
* in qemu, one needs to increase the size of the available RAM,
this setting does the trick, CONFIG_RAM_SIZE=300
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Refactor internals of IPM driver removing bitfields and byte access of
32 bit registers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The current method of accessing 32-bit data and control registers does
not work for all quark architectures. Sometimes writing to those
registers byte-by-byte results in last byte occupying whole 32 bit
register.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Move all characters to "char" type: no implicit conversions between
"unsigned char", "u8_t", etc.
Tested with ISSM 2016.2.085.
Jira: ZEP-2159
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Semantics of ENOENT error as used previously is "named entity not
found", whereas for "I/O handle is not valid", there's EBADF. For
example, POSIX/SUSV2 doesn't even list ENOENT as a possible error
for accept(), connect(), recv(), etc. whereas it lists EBADF, e.g.:
http://pubs.opengroup.org/onlinepubs/7908799/xns/connect.html
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Add a repeat param to gatt-write-without-response so that
it covers what gatt-write-without-response-repeated was
doing. gatt-write-without-response was removed in the
commit 26eae70da.
gatt-write-signed too will have repeat param with this
change.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add clarification that the DNS server configuration must be edited in
the respective prj.conf file.
JIRA: ZEP-2040
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Inserting the IDT results in any data afterwards being shifted.
We want the memory addresses between the zephyr_prebuilt.elf
and zephyr.elf to be as close as possible. Insert some dummy
data in the linker script the same size as the gen_idt data
structures. Needed for forthcoming patches which generate MMU
page tables at build time.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Having tried and tested building Zephyr using the standard SDK on
Windows 10 using the new WSL (Windows Subsystem for Linux), add the
documentation so that others can benefit from the functionality.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This patch adds a YAML template file that describes the format of a
Zephyr device tree YAML specification.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds documention for device tree development in Zephyr. This
includes a description of device tree, how it is integrated into Zephyr,
and other related information.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
At the moment all bluetooth logs are prefixed with [bt] making it
difficult to understand where the logs belong to.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The kernel tracks time slice usage with the _time_slice_elapsed global.
Every time the timer interrupt goes off and the timer driver calls
_nano_sys_clock_tick_announce() with the elapsed time, this is added to
_time_slice_elapsed. If it exceeds the total time slice, the thread is
moved to the back of the queue for that priority level and
_time_slice_elapsed is reset to zero.
In a non-tickless kernel, this is the only time _time_slice_elapsed is
reset. If a thread uses up a partial time slice, and then cooperatively
switches to another thread, the next thread will inherit the remaining
time slice, causing it not to be able to run as long as it ought to.
There does exist code to properly reset the elapsed count, but it was
only compiled in a tickless kernel. Now it is built any time
CONFIG_TIMESLICING is enabled.
Issue: ZEP-2107
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The STM32F412 has PWM output capabilities. Add support to the blink_led
samples.
Tested using a Nucleo STM32F412ZG board (PWM output on pin 28 of the
CN11 Morpho connector and pin 29 of the CN10 Zio connector).
Change-Id: I75fb986fa97bd1c07c6375938430e7963297cd9d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary Kconfig and minimal device tree in order to support
STM32F412ZG variant as found on the Nucleo STM32F412 board.
Origin: Original
Change-Id: Ic98a686f478ce551dc6101466ed0cf16924109e8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of stm32cube LL based clock control driver
for stm32f1 series, update stm32f1xx based boards to support new
driver settings
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
