When building with more than 1 job, we were getting:
make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule.
Trying to fix this in the Makefile resulted in dependency issues and unsatisfied
dependencies in the compilation and build chain.
Change-Id: Ic73d089cf6a0a0d7b6fd83908b8144c34af25582
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
- Use interface script from openocd distribution
- add debug support
Change-Id: If7e0ab0ad1fc6e67ca648a0a7c32356b3db90cf0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Do not try to check for compiler options during build. This fails
miserably on windows.
Change-Id: I8c84f197ca78897755f67e35fd3a75c30c1d3b7c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This reverts commit e3c2477c52f792ec972f9715ac9a810e52bc9929.
This was done for windows build support. We can disable this for
windows individually instead of disabling it for everyone.
Change-Id: I8bd322b024c0471f89e83a41589c03783c0f9893
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove float option from 'max' configuration and add a new
'float' test for hardware that supports floating point.
Move configuration files into directories to ease maintenance.
Change-Id: Ibf4c88ea946a78b8025bc61409b0ab661250f4fb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Restructured the API documentation and moved it from the Reference
section to the Developer guides section.
Added a note about the search function to help users find the API they
are looking for faster.
Splitted the API docs into two files one for nanokernel and another for
the microkernel APIs.
Added table of contents for each of the API sections with a back link on
the headings to take the users back to the top of the page. Making
navigation easier and more user friendly.
Change-Id: I80f415a60ea9c7df22276b464013e906e1efa511
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
There are situations when the transfer starts before we have the time to
enable the CS line, so to be sure, we active it before even attempting
to start the transfer.
This fixes an CC2520 driver initialization issue using the QMSI SPI driver.
Change-Id: Ib9b324b77260ac537f714376c8056b1543e7e3b3
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
First pass at a script/process that an end user can run to backup and restore
the binary state of an Arduino 101 system.
Change-Id: I5979bdea5aaa2a77b0e0bb0e44de65ba74cbfd65
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Edits based upon the first version of feedback from the User Trial
sessions.
Change-Id: Ie339eaebab4a43a822e419cf988d9b9893faa922
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
As the UART uses I/O port access, it needs to be pointed out
to override default MMIO setting.
Change-Id: Ibf923b5cab547f9eec991900c5f7a8b2ffbc3832
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Adds logger support to iamcu core for the following features:
- context switch logger
- interrupt logger
- sleep logger
Change-Id: Icfbd5fa787633045ba2895e8c28b652c55575b86
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The toolchain provided by Yocto has a specific path location.
The linux toolchain home directory after the installation is
sysroot/i686-pokysdk-linux meanwhile the mingw toolchain home
directory is sysroot/i686-pokysdk-mingw32
Change-Id: I2241a996897539c2c630c6e391f5125b51385b8e
Signed-off-by: Louise Mendoza <yonattan.a.louise.mendoza@intel.com>
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
For QMSI drivers with combined interrupts, we need to use level
triggered interrupts. This is the case of the GPIO controller.
If we keep it configured as EDGE, the user will never be able to
get a pin configured as LEVEL to fire more than 1 interrupt.
Change-Id: I36bffc79183ca97f431c4f5811ed5d56e2fd82e8
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Restructured the guide to follow a basic three step process: Set up, develop,
build. All information that is independent of the OS selection was taken out of
of the OS related documents and placed in the general set up sections.
A new section, Developing Zephyr Applications, was added with links to all the
development relevant section of the documentation.
The content in local_development.rst was split between the setting_up.rst,
installation_linux.rst and installation_mac.rst files as appropriate.
This new structure provides a much better flow for developers beginning their
Zephyr develpment.
Applied all of Inaky's suggestions in the refactored content.
Minor markup fixes and language edits were also perfomed during the refactoring.
Fixed a cross-reference that was broken during the refactor.
Applied all the feedback from the first trial run.
Applied the feedback provided by David Kinder from TCS.
Change-Id: I3368a3a41ec9ad02cc4e7b37fe71c65abd8a7df9
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
config_info data comes after driver_data (though the first one is
usually the one you use first, but anyway).
Fixes a bug introduced by my commit id
3eade319e878c7e11faf4cd93a99d33737e16e6c
Change-Id: I3f58b7fd9605270bb6edf24ae0d129313ac9ab2f
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The common stub code didn't prefix the arg to 'mov' with a
'$', causing the assembler to generate code which tries to
dereference the argument before sticking it in EAX.
Change-Id: I0e201f799565d9709e3969b82ae2eb3f93a78b3a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The ASM stub invoked by irq_offload() wasn't switching to the
interrupt stack.
Change-Id: I0c52092a50396aa892e71f0501bbda38395d7554
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Making pipe driver configuration for quark_se makes no sense for the
board. First it simply wrong since IRQs for serial are 5 and 6 and
when using PIPE care should be taken to allocate right way serial and
Bluetooth for the given UARTs.
Change-Id: I4cb3227a8be34fbfa089a457e6d9977e4adcfd19
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add tester support for arduino_101 board reusing UART1.
Change-Id: Ifc00f92a80accffc37fd9b09df798ff995340a1c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The default number of IRQs is good enough for this sample.
Change-Id: I00f2088b4c82d60717563e36ebccfecac3983522
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Because of the necessity of using a GPIO pin as Chip Select, we need to
set the initialization priority of the SPI driver so it occurs after the
GPIO driver.
Change-Id: I02d675d8267ee07b267155a3806be85fbf57378c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
There are cases that it is needed to use a GPIO pin as chip
select (frames would be too long, for example), so using a GPIO pin as
chip select to keep the line active while the transfer is ongoing is the
usual solution.
This implements that solution for the QMSI shim driver.
Change-Id: Ia6b8f0f17161e20f87ad3def1468fe0abea65fdc
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This application reads the 'WHO AM I' register from a LSM9DS0
sensor connected over SPI.
Change-Id: I7b0631e9bc783aea60fdb489f40058e0c15275fb
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
QUARK_SE_IPM_CONSOLE_RING_BUF_SIZE32 symbol must be editable through
configuration menus and configuration snippets (QA request).
Adding a title for the kconfig symbol makes it editable.
Change-Id: Id0147a50d94033e1392327935bcbfbdb5a9eedd8
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This driver uses the QMSI library and mostly translates calls from the
Zephyr API to QMSI ones.
This driver conflicts with the native driver implemenation. In order to
enable it, you must set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH_TO_QMSI"
CONFIG_SPI_QMSI=y
CONFIG_SPI_QMSI_PORT_0=y
CONFIG_SPI_QMSI_PORT_1=y
Missing:
- Support for using a GPIO pin as Chip Select;
Change-Id: I0d8eca88a2a803b6b3604f396f874313fe90753c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Both ARM and ARC did not have the right include path defined.
Change-Id: I8322b49ffa1830ef7b06cddef686ceb83a85fdfa
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test builds the syncronisation app using the following config
options to verify if the build is successful:
- CONFIG_DEBUG
- CONFIG_NEWLIB_LIBC
Change-Id: Idf2fe948ab58982244b3590da938a83206103be3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Using the latest SDK (0.7.2) you can flash directly using make
by specifying the board, for example
make BOARD=arduino_101 flash
This will build and flash the generated binary to the board.
Change-Id: I90254abd69874efbb449ef318079958980c23074
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Decisions on compiler optimizations were done on the architecture level,
this does not scale and some SoCs will have different optimization levels
or compiler options needed. Moving this to the SoC makes it easy to optimize
differently when using the same CPU which we use to set the right optimization
now on the architecture level.
For IAMCU platforms, use the right architecture and tuning.
-march=lakemont -mtune=lakemont -miamcu -msoft-float
Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds code to the gpio sample apps to run on Arduino due,
using the gpio_atmel_sam3 driver.
Change-Id: Ida16ceeabf55eb7efedc94c56ff875d8fad6456d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The default Kconfig option is missing a condition for the SRAM
base address on SAM3X8E. Add it back so the correct default
can be used.
Change-Id: Ib4103366f693648c76630cbbd71ca98109381d5c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames the gpio_dw sample app to gpio, as this can be used
for multiple drivers.
Change-Id: I6f21237b5b8df10f531e47ad9f75cadfd619cd34
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The PIO controllers on Atmel SAM3 family processors can be
used for GPIOs, so this is the driver.
Change-Id: I3d5712f3a0a71025b820ca1c08dd767ee1e136d8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some GPIO controllers allow individual pins to be detached
from the controller (i.e. the controller no longer affects
the pin output, or can read its state).
This adds the configuration bits to the API so this feature
can be used by apps.
Change-Id: I355fd5910a5439dcabe01ab40cd887dda30eab72
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
