Fixed whitespace such that 'XTOOLS_TOOLCHAIN_PATH' is vertically
aligned.
Also, combined two cmake invocations of 'list' into one.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
ARCH is available before CONFIG_ARCH, and is otherwise identical. So
it is better to use ARCH than CONFIG_ARCH as this allows the code to
be moved around more freely.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Drop the seemingly unused XCC_BUILD variable because it depends on
Kconfig and we need to cut the toolchain's dependency on Kconfig.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
'make flash' always erase the flash banks from sector 0, and flashing
the Zephyr.bin file to base address of flash even if there has a
bootloader placed on the first sector.
Users maybe want placed Zephyr to another location instead of sector
0 by adding 'zephyr,code-partition' in dts. But the openocd scripts
doesn't deal with that currently.
Fix this issue, flash zephyr.elf instead of zephyr.bin, elf file
contain load address and openocd scripts can deal with it.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Users expect that not just "some" compatible python is detected, but
also that it will be the 'python' executable from PATH, at least when
this executable is valid.
To this end rewrite FindPythonInterp to give this executable the
highest priority.
This fixes#11857
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
In CMake 3.13 a warning is produced if one does not explicitly state
what the policy for CMP0079 should be. To resolve this warning we set
policy CMP0079 to OLD.
This is expected to have no semantical change. When we want a
semantical change we can flip the policy and port the build scripts to
the new behaviour.
This fixes#11794
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Driver was not complaining when unsupported bus values where used.
Add default to switch cases and return error.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
GPIO pin interrupts share common EXTI resources.
Return an error when attempt to configure a line already in use.
Fixes#10611
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove QEMU instructions as those do not work. Add native_posix
board instructions for running gPTP with linuxptp daemon.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add symbolic names to trigger mode (LIS3DH_TRIGGER_MODE) in order to
be defined in board defconfig files.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Convert lis3dh accelerometer driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This is needed to force the .common type to .bss type.
This will force the .common variables to go into bss section
in the compiled object file.
As of now the movement to the .bss section was happening only
during the final linking stage.
The -fno-common option specifies that the compiler should place
uninitialized global variables in the data section of the object
file, rather than generating them as common blocks. This has the
effect that if the same variable is declared (without "extern")
in two different compilations, you will get a multiple-definition
error when you link them.
e.g:
// file a.c
// file-scope
int b;
// file b.c
// file-scope
int b;
If there exist two non-extern declarations of the same variable
then no-common will cause a linker error.
This sequence would have compiled before, but will now cause a
linker error.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This sample was creating objects from header file in the bss.
Fixed it by moving the objects to appropriate object files.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
These tests were creating objects from header file in the bss.
Fixed it by moving the objects to appropriate object files.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
The header ipm_quark_se.h was creating a object. Hence removed it
and placed the same in ipm_quark_se.c
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Added basic working details of code/data/bss relocation feature,
how to use with examples & code sample details
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
This sample provides an example for using the code relocation
feature. This example will place text,data,bss from 3 files to
various parts in the SRAM. For this a custom linker file is used
which is derived from include/arch/arm/cortex_m/scripts/linker.ld.
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
When code relocation feature with userspace mode is turned on we
need a bit more memory to fit the text section for these 2
generated files.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This patch splits the text section into 2 parts. The first section
will have some info regarding vector tables and debug info. The
second section will have the complete text section.
This is needed to force the required functions and data variables
the correct locations.
This is due to the behavior of the linker. The linker will only link
once and hence this text section had to be split to make room
for the generated linker script.
Added a new Kconfig CODE_DATA_RELOCATION which when enabled will
invoke the script, which does the required relocation.
Added hooks inside init.c for bss zeroing and data copy operations.
Needed when we have to copy data from ROM to required memory type.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This patch creates a rule in the cmake to trigger the generation
of linker_relocate.ld and code_relocation.c files.
The linker_relocate.ld will create appropriate sections and will
link the required functions or variables from all the selected
files.
The code_relocation.c will have code that is needed for
initializing data sections and copy of text sections(if XIP).
Also this will contain code that is needed for zeroing of bss.
The procedure to invoke this feature is:
1. Enable CONFIG_CODE_RELOCATION in the prj.conf
2. Inside CMakeList.txt in the project we need to mention
all the files that needs to get relocated.
zephyr_kernel_code_relocate(src/*.c SRAM2)
Where the first argument is the file/files and the second
argument is the memory where it has be placed.
NOTE: The file argument supports glob expressions.
NOTE: Step 2 can be done as many times as required. And relative
paths can be given here.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This script will relocate .text .data and .bss sections from
required files and places it in the required memory region. This
memory region and file are given to this python script in the form
of a string. Refer to the script for the format of this string and
the procedure to invoke it.
The main goal of this script is to provide a robust way to re-order
the memory contents without actually having to modify the code
(C source code and the linker code).
In simple terms this script will do the job of
__attribute__((section("name"))) for a bunch of files together.
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Move libapp.a into it's own directory. This would make it's placement
consistent with how zephyr.elf is placed.
E.g. it might now look like:
ls b/*
b/build.ninja b/CMakeCache.txt b/cmake_install.cmake b/rules.ninja
b/app:
libapp.a
b/CMakeFiles:
3.12.0 cmake.check_cache CMakeOutput.log TargetDirectories.txt
app.dir CMakeError.log CMakeTmp
b/zephyr:
arch kernel subsys
boards lib tests
cmake liboffsets.a zephyr.bin
CMakeFiles libzephyr.a zephyr.elf
cmake_install.cmake linker.cmd zephyr.hex
ext linker_pass_final.cmd zephyr.map
include linker_pass_final.cmd.dep zephyr_prebuilt.elf
isrList.bin misc zephyr.stat
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Now that we can support the same compatible but different bus types,
update the LSM6DSL support to utilize the same compatible for either I2C
or SPI. We rename the i2c binding file to st,lsm6dsl-i2c.yaml just to
be a bit more clear.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For devices on buses like I2C or SPI its possible that a sensor might
support being on either bus type. In the dts we can tell this by
looking at the parent bus of the device. Its useful for a driver to
know this so can we build support into the driver accordingly.
For example if the LSM6DSL sensor ("st,lsm6dsl") is in the dts on a spi
bus we now generate:
#define DT_ST_LPS22HB_PRESS_BUS_SPI 1
Its possible that a system exists in which multiple of the same sensor
exist but on different busses, so drivers should handle that case
accordingly. For the LSM6DSL example we'd end up with:
#define DT_ST_LPS22HB_PRESS_BUS_I2C 1
#define DT_ST_LPS22HB_PRESS_BUS_SPI 1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There are a number of cases in which we a sensor can be either connected
on I2C or SPI. We've been treating these cases as different compatiable
properties, but they really should use the same compatiable and just
determine the info based on the parent bus in the device tree. We can
now support having two different binding files for the same compatiable
to handle the case of a sensor supporting either I2C or SPI as how its
connected.
We put "sensor" nodes in a bus specific dict bus_bindings[bus] that
we can than lookup later based on the DTS and determining the bus type
that the "sensor" node is on.
Fixes#11375
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
