Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.
As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
This provides a HAL for the OpenISA RV32M1 SoC.
Origin: open-isa-rv32m1 GitHub organization
URL: https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv
Revision: 365b1060f0947d5250c07b3eebdbc9e54cd0246e
Maintained-by: External
License: BSD-3-Clause
Signed-off-by: Marti Bolivar <marti@foundries.io>
Borrow from an Arm Cortex-M convention where each Kconfig.soc can
define a 'config WDOG_INIT' that does watchdog initialization early in
the boot process if that SoC needs it.
Some SoCs have watchdogs that are enabled by default and need to be
turned off during reset handling (to be re-enabled if necessary by a
Zephyr watchdog driver).
Signed-off-by: Marti Bolivar <marti@foundries.io>
A couple of follow-on patches suggested after previous RISCV32 arch
changes were merged.
Tweak some help in arch/riscv32/kconfig to better work with the RST
docs.
Take out all the CONFIG_PRINTK ifdeffery in fatal.c. The cause_str()
routine should get compiled out if PRINTK=n anyway.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".
Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.
Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.
Signed-off-by: Marti Bolivar <marti@foundries.io>
A GCC-based toolchain may require additional, toolchain-specific
values in CMAKE_REQUIRED_FLAGS to perform compiler checks properly,
but gcc.cmake clobbers any values the user provides.
Preserve them instead, allowing users to give their own compiler
checking flags at generation time.
The details for the particular issue that inspired this are described
in https://github.com/pulp-platform/pulpino/issues/240.
Signed-off-by: Marti Bolivar <marti@foundries.io>
It's not an error if a driver does not implement callback related
function. Let's return -ENOTSUP relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.
Fixes#11394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The old legacy APIs use net-app library and as that is being
removed, then the dependencies need to be removed also.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If we include this headers files in cpp source code,
the compiler say"error: template with C linkage".
Includes must be moved outside the 'extern "C"' section.
Signed-off-by: Benoit Leforestier <benoit.leforestier@sekurity.fr>
Build fails in smp.c:3942 if BT_SMP_SELFTEST is enabled,
sign_test uses smp_sign_buf which only available for BT_SIGNING.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Include building the init tests with the new Link Layer
split architecture.
Has the data length update and controller privacy disabled
until they are implemented in the new architecture.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Ensure that changes to DeviceTree sources cause CMake to be re-run
when make/ninja is invoked.
Note that this is not perfect, as it does not cover files that are
\#included, but it will cover most DT changes.
This fixes#12692
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The header comment in 'generated_dts_board_unfixed.h' was including
'compatible' as a helpful text.
But something has been broken with how we extract 'compatible' because
it was being evaluated to 'q'. Giving a confusing header text:
Generated include file q
Since the mechanism is broken, and does not appear to be important, we
remove it.
Also, modernize how we generate multi-line strings.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
extract_dts_includes.py has been generating DT output and then
concatenating it with fixup header files to create
'generated_dts_board.h'.
In this patch we instead introduce a source file named
'generated_dts_board.h' and have it \#include the appropriate DT
output and fixup files.
This results in a simpler system because users can now read
'generated_dts_board.h' as C source code to see how fixup files and
generated DT output relate to each other. Whereas before they would
have to either read documentation or python code to gain the same
understanding.
Also, it reduces the scope and complexity of one of our most bloated
python scripts, extract_dts_includes.py.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Basic test for poll() behavior. UDP sockets are used for simplicity
so far (poll-related paths for UDP and TCP are similar, though later
adding TCP explicitly for full coverage may be useful).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
The idea is that we should have many, many tests. The only reasonable
way to achieve that is by making tests easy and pleasant to write,
and that requires common, easy to reuse infrastructure.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
1. Consistently use prepare_sock helpers.
2. Test not just client->server sending, but sending reply.
3. Send large packets (>1 net_buf fragment), not just small.
4. Check POSIX behavior on recv()ing datagram incompletely (the rest
should be discarded and next recv() should read next datagram.
5. More cleanroom testing, e.g. explicitly reinitialize input params
on each call (without assumptions that they're left with suitable
values from previous calls), clear input buffers before each read
operations, etc.
6. Reformat code. Previously it was very sparse, giving long test
functions, and thus impression that tests are complicated and hard
to write.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
In OpenThread RLOC address and ALOC address are used for internal mesh
routing and should not be used by applications as they can change
dynamically during runtime. Therefore prevent registering them on Zephyr
interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
dtc 1.4.6 doesn't support the -Wno-unique_unit_address flag. We need to
check that the flag is supported before using it on pre dtc-1.4.7
versions.
Fixes#12685
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Continuation of a bullet list item wasn't indented properly, causing a
new list to be started (with odd indentation).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This change adds an email alias for Code of Conduct reports and
identifies the recipients of reports.
Signed-off-by: Thea Aldrich <aldrich.thea@gmail.com>
This change adds a Code of Conduct based on
https://www.contributor-covenant.org/. Additional reporting and
enforcement guidelines will be added at a later date.
Signed-off-by: Thea Aldrich <aldrich.thea@gmail.com>
If we are setting the code to be in HyperFlash (CONFIG_CODE_HYPERFLASH)
or QSPI (CONFIG_CODE_QSPI) we should enable
CONFIG_NXP_IMX_RT_BOOT_HEADER.
Update mimxrt1064_evk to use select like other boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Depending on the installed and enabled SDK, we now load the right
configuration allowing people to migrate gracefully to the new SDK.
The selection is done based on the version of the SDK. Minimal required
SDK is still kept as 0.9.5.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Complete code factorization in stm32 exti drivers.
Add return value in case line is not implemented.
Except returned error code, refactor has been done iso-feature
compared to previous code. Hence error is reported only when
support was not available on previous series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This sample is made to demonstrate use of x-nucleo-ik01a2 shield.
It requires a board with Arduino i2c where it can be plugged on.
The sample has been tested on Nucleo F401RE board.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add LSM303AGR ecompass (accelerometer + magnetometer) sensor support.
The LSM303AGR accelerometer and LSM303AGR magnetometer are s/w
compatible with respectively LIS2DH and LIS2MDL sensors and can
share same driver with those sensors.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
