Implemented dynamic allocation of memory pools in a similar to manner to
what was already implemented for message queues. Added all the same
checks on size vs. maximum allowed and current heap.
Added an additional Kconfig variable to define the maximum size of a
dynamically allocated memory pool.
Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
Added some additional checks when creating a message queue to ensure the
size of the queue does not exceed the size of the buffer passed in via
the optional attributes.
Added a new Kconfig option to limit the maximum size of a message queue
dynamically allocated on the heap.
Added a check to ensure the heap is at least large enough to hold a
maximum size dynamically allocated queue.
Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
Added Kconfig dependency that NUM_PREEMPT_PRIORITIES must be at least
osPriorityISR (56). This was enforced by a build assert message but not
decribed in the Kconfig.
Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
The commit 77cb942a97 broke the generation of sw_isr_table for
multi-level IRQs. This patch fixes it.
Fixes#13082.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Enable the SPI driver on the HiFive 1
This makes the following configurations choices for the HiFive 1:
The SPI 0 peripheral driver is not enabled by default because it is in
charge of mapping the SPI flash into memory. This can be configured
using the CONFIG_SIFIVE_SPI_0_ROM KConfig option.
The SPI 1 peripheral driver is enabled by default and the pinmux is
configured for all of its outputs
The SPI 2 peripheral driver is enabled by default because it is present
in the DTS for the FE310, but because the QFN48 package used on the
HiFive 1 doesn't route those pins from the silicon die, the pinmux can't
enable the SPI 2 pins.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
The 0.10 version of the Zephyr toolchain supports building on the
openisa_rv32m1 SoC. So if the ZEPHYR_TOOLCHAIN_VARIANT is 'zephyr'
than select RISCV_GENERIC_TOOLCHAIN.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Expose ZEPHYR_TOOLCHAIN_VARIANT so that Kconfig can make choices based
on how its set. For example we RISCV_GENERIC_TOOLCHAIN if the variant
is 'zephyr'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit enhances the power_mgr sample by adding code
presenting power state locking API as well as its effect
on the decisions made by the Power Management Policy.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit enables fine-grained power state locking.
Now, each power state could be independently enabled or disabled.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
add the handling of APP_SHARED_MEM.
privileged threads can access all the mem
explictly defined in user mode, i.e., APP_MEM & APP_SHARED_MEM
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Indicate that PWM is supported on several Nordic DK boards so that
the pwm_nrf5_sw and pwm_nrfx drivers are covered by CI builds.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable HW PWM driver instead of the SW one on nRF SoCs where the PWM
peripheral is present.
Default PWM instances are also enabled on Nordic DK boards so that it
is possible to build the basic fade_led sample for them without extra
adjustments.
After the above changes are applied, some configuration alterations
in basic samples blink_led and fade_led become no longer needed.
These are removed. And the blink_led sample is corrected so that it
works with the nRF HW PWM driver as well.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch puts checks in place to ensure that callers to the k_mem_slab
APIs provide word aligned block sizes. If this is not done, this can
result in unaligned accesses and subsequent crashes.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This reverts commit eb6ea28649.
Reverting this to avoid confusion in using the gpio callbacks.
Fixes#11565
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch increases the amount of slab memory per item for the shell
history to match the maximum command input buffer size plus the
accounting information for the dnode list item.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
PAE tables introduce the NX bit which is very desirable
from a security perspetive, back in 1995.
PAE tables are larger, but we are not targeting x86 memory
protection for RAM constrained devices.
Remove the old style 32-bit tables to make the x86 port
easier to maintain.
Renamed some verbosely named data structures, and fixed
incorrect number of entries for the page directory
pointer table.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Those are outdated and unrunnable tests that require lots of
customization to keep them building and the information they provide
can't be retrieved in other means.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The selection of the Cortex M systick driver to be used
as a system clock driver is controlled by
CONFIG_CORTEX_M_SYSTICK.
To replace it by another driver CONFIG_CORTEX_M_SYSTICK
must be set to 'n'. Unfortunately this also controls
the interrupt vector for the systick interrupt. It is
now routed to __reserved. More bad the interrupt vector
can not be set by IRQ_CONNECT as it is one of the hard
coded interrupts in the interrupt table.
Route the hard coded systick interrupt to z_clock_isr
and make z_clock_isr a weak symbol that can be overwritten
by an alternative systick system clock driver.
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
Use (free license) fontawesome icon characters to pretty up the Zephyr
home page navigation blocks added earlier. (The fontawesome font famliy
is already included by the read-the-doc theme so we can take advantage
of that.)
Also amend the section descriptions.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Top-level Makefile is for documentation build convenience, so make it a
bit more convenient by adding a make clean target (sometimes needed when
to do a clean doc build when changes are made).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Actually, add the "status" property that enables the nodes explicitly.
They were apparently enabled by default without this property.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Indicate that watchdog is supported on several Nordic DK boards
so that the wdt_nrfx driver is covered by CI builds.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Now that the SAM Ethernet driver can work when the cached is enabled, it
is possible to unconditionally enable the data cache on the SAM E70 SoC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This patch adjusts the way we are doing push/pop operations before
making function calls inside of assembly routines. ARM requires 8
byte aligned stack operations across public interfaces. This means
that we need to be sure to push multiples of 2 registers.
Fixes#2108
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If you enable HW_STACK_PROTECTION, DEBUG_OPTIMIZATIONS, and
CPU_STATS, you can get a crash when switching to the main thread
due to the r3 getting munged during a inline ASM call. This patch
fixes that by adding r3 to the clobber list.
Fixes#12821
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In some cases sanitycheck handles a build error that started with 'make
run' as a handler crash when it actually failed during building. Right
now we try to attach the handler.log to the XML output even if it did
not exist. Check for the file and if it was not found, go back to the
build.log
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The iterator over registered callbacks failed to account for the
possibility that the callback would remove itself from the list. If
this occurred any remaining callbacks would no longer be reachable from
the node. Switch to the slist iterator that is safe for self-removal.
Note that the slist API remains unsafe for removal of subsequent nodes.
Even with the corrected code removal of the next callback registration
(cached in tmp) will result in it being called anyway, with the
remaining unremoved registrations not being called. If the next
callback were removed and re-registered on a different device, the
callbacks would be invoked for the wrong device.
Resolve this by a documentation change describing the conditions under
which a change to callback registration from within a callback are
permitted. Add a similar note regarding the effect of adding a
callback. The current event invocation behavior for callbacks added
within an event is explicitly left unspecified, though in the current
slist implementation newly added callbacks will not be invoked until the
next event.
Closes#10186
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This reverts the documentation component of commit
eb6ea28649.
The original change broke the API contract: drivers that use GPIOs need
to be able to configure callbacks without being aware of whether a
particular implementation expects to use a mask or a pin ordinal.
Revert the API documentation to its original format, and mark that the
added field should be removed when issue #11565 is resolved.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit re-works the NXP MPU driver implementation so that
it aligns with the implementation for ARMv7-M and ARMv8-M MPU
architectures.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit removes the unnecessary MPU region type definitions
from arm_core_mpu_dev.h, as they are not used any more in any of
the architecture-specific MPU implementations (ARMv7-M, NXP, and
ARMv8-M MPU).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit removes obsolete ARM CORE MPU API definitions
and related implementation from arm_mpu.c, in the wake of
the transition to the new ARM MPU design.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit moves all internal implementation, relevant for
User mode, in a single place in the arm_mpu_v7_internal.h,
arm_mpu_v8_internal, and in arm_mpu.c. Additionally, the
commit cleans up internal function _get_region_attr() that
is not used any more.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit updates the ARM Core MPU API for memory domains,
to align with the principle of de-coupling the partitioning
and the access attribution with the architecture-specific
MPU driver implementation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the implementation of internal ARM MPU
function, arm_core_mpu_get_max_available_dyn_regions(),
required by _arch_mem_domain_max_partitions_get(),
according to the new architecture. The function returns
the number of the available partitions for memory domains
based on the total amount of HW regions and the
actual number of statically configured MPU regions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
