Commit graph

99049 commits

Author SHA1 Message Date
Andrew Boie
ad2d7ca081 x86: fix page directory out of bounds
PAE page tables (the only kind we support) have 512
entries per page directory, not 1024.

Fixes: #13838

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-28 15:03:06 -08:00
Daniel Leung
adb9f0e02e xtensa: intel_s1000: turn on XTENSA_ASM2
Turns on XTENSA_ASM2 by default for intel_s1000.

Fixes #11034

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 14:53:52 -08:00
Andy Ross
fc3ca95ba7 tests: Mass SMP disablement on non-SMP-safe tests
(Chunk 2 of 3 - this patch was split across pull requests to address
CI build time limitations)

Zephyr has always been a uniprocessor system, and its kernel tests are
rife with assumptions and outright dependence on single-CPU operation
(for example: "low priority threads will never run until this high
priority thread blocks" -- not true if there's another processor to
run it!)

About 1/3 of our tests fail right now on x86_64 when dual processor
operation is made default.  Most of those can probably be recovered on
a case-by-case basis with simple changes (and a few of them might
represent real bugs in SMP!), but for now let's make sure the full
test suite passes by turning the second CPU off.  There's still plenty
of SMP coverage in the remaining cases.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-28 12:47:12 -08:00
Tim Sørensen (TIMS)
ed80be5281 doc: Fixed a link in CONTRIBUTING.rst
Corrected "Contribution Guidelines" link in CONTRIBUTING.rst.

Signed-off-by: Tim Sørensen (TIMS) <tims@oticon.com>
2019-02-28 12:46:04 -08:00
Daniel Leung
1af5fa174b gpio: gpio_intel_apl: fix if condition leading to dead code
GPIO_INT_ACTIVE_LOW is 0 which means it cannot be simply AND-ed.
So fix the condition.

Fixes #13880

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 12:44:45 -08:00
Ioannis Glaropoulos
ca3b6c680f tests: kernel: fatal: remove #ifdefs for ARM platforms
This commit removes the #ifdefs for ARM platforms in
tests/kernel/fatal/main.c, as all the tests suite can be
executed for platforms supporting the ARM and the NXP MPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
1f8c57e0f9 arch: arm: core arch function to evaluate stack corruption
This commit introduces a generic arch/arm function to evaluate
thread stack corruption. The function shall be used upon
occurrence of MemManage and Bus Faults.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
1735d8794e arch: arm: stress that IRQ tail-chaining cannot always be guaranteed
This commit adds an explanatory note in the places
where we manually adjust the PSP after stacking Bus
and MemManage errors, stressing that this is due to
the fact that interrupt tail-chaining cannot always
be guaranteed by the processor.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
602001d938 arch: arm: remove redundant check for imprecise error
The commit removes a redundant check for imprecise bus fault,
when a precise bus fault has occurred, now that we have
re-worked the BusFault handler to iterate through all possible
bus errors.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
69b06a464c arch: arm: nxp: properly assess stack corruptions upon BusFaults
This commit reworks the logic, based on which we assess
thread stack corruptions upon BusFault exceptions triggered
by the NXP MPU module. BusFaults rely on calling external
function to assess whether a thread stack corruption due to
overflow has occurred. Upon detection of stack corruption,
the current stack pointer is manually adjusted upwards, to
prevent un-stacking errors from firing up upon returning from
the exception.

Additionally, the commit allows to be checking for all different
types of BusFault occurrences that are reported through BFSR,
without stopping after having spotted the first BusFault type.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
2201490ab6 arch: arm: properly assess stack corruptions upon MPU faults
This commit reworks the logic, based on which we assess
thread stack corruptions upon MemManageFault exceptions.
Furthermore, it takes out all kernel-related logic and relies
on calling external function 'evaluate_thread_stack_corruption'
to assess whether a thread stack overflow has occurred. Upon
detection of stack corruption, the current stack pointer is
manually adjusted upwards, to prevent un-stacking errors from
firing up upon returning from the exception.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
4311b5e563 arch: arm: improve debug message and help test for UsageFault
This commit improves the debug message on UsageFaults
related to Stack overflow, stating that the context
area is not valid. An inline comment is added, with
more detailed explanation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Ioannis Glaropoulos
0348c53574 arch: minor white-space fix in Kconfig
A minor space removal in help test off FLASH_BASE_ADDRESS.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 11:57:25 -08:00
Maureen Helm
a0335b5223 soc: openisa_rv32m1: Implement sys_arch_reboot()
Implements sys_arch_reboot() on the openisa_rv32m1 soc to enable zephyr
micropython on the rv32m1_vega board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-28 13:15:41 -06:00
Andy Ross
3f4aa6316c tests/kernel/sched/schedule_api: Restore spinning for timer alignment
Commit 0cc362f873 ("tests/kernel: Simplify timer spinning") was
added to work around a qemu bug with dropped interrupts on x86_64.
But it turns out that the tick alignment that the original
implementation provided (fundamentally, it spins waiting on the timer
driver to report tick changes) was needed for correct operation on
nRF52.

The effectively revert that commit (and refactors all the spinning
into a single utility) and replaces it with a workaround targeted to
qemu on x86_64 only.  Fixes #11721

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-28 13:06:48 -06:00
Andy Ross
a334ac2045 tests: Mass SMP disablement on non-SMP-safe tests
(Chunk 1 of 3 - this patch was split across pull requests to address
CI build time limitations)

Zephyr has always been a uniprocessor system, and its kernel tests are
rife with assumptions and outright dependence on single-CPU operation
(for example: "low priority threads will never run until this high
priority thread blocks" -- not true if there's another processor to
run it!)

About 1/3 of our tests fail right now on x86_64 when dual processor
operation is made default.  Most of those can probably be recovered on
a case-by-case basis with simple changes (and a few of them might
represent real bugs in SMP!), but for now let's make sure the full
test suite passes by turning the second CPU off.  There's still plenty
of SMP coverage in the remaining cases.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-28 13:02:20 -06:00
Andy Ross
85d895c60e lib/os: Remove recursion from mempool and rbtree
MISRA rules (see #11425) forbid recursive algorithms.  In the case of
rb_walk(), it's not actually used anywhere but a test right now, so we
can simply disable the API when CONFIG_MISRA_SANE is defined.  Mempool
had a (IMHO, fairly clever) tail recursive loop in bfree_recombine()
which can be trivially transformed into an only slightly uglier
iterative version.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-28 10:06:35 -08:00
Andy Ross
fe04adf99b lib/os: Conditionally eliminate alloca/VLA usage
MISRA rules (see #9892) forbid alloca() and family, even though those
features can be valuable performance and memory size optimizations
useful to Zephyr.

Introduce a MISRA_SANE kconfig, which when true enables a gcc error
condition whenever a variable length array is used.

When enabled, the mempool code will use a theoretical-maximum array
size on the stack instead of one tailored to the current pool
configuration.

The rbtree code will do similarly, but because the theoretical maximum
is quite a bit larger (236 bytes on 32 bit platforms) the array is
placed into struct rbtree instead so it can live in static data (and
also so I don't have to go and retune all the test stack sizes!).
Current code only uses at most two of these (one in the scheduler when
SCHED_SCALABLE is selected, and one for dynamic kernel objects when
USERSPACE and DYNAMIC_OBJECTS are set).

This tunable is false by default, but is selected in a single test (a
subcase of tests/kernel/common) for coverage.  Note that the I2C and
SPI subsystems contain uncorrected VLAs, so a few platforms need to be
blacklisted with a filter.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-28 10:06:35 -08:00
Kumar Gala
846dfd4b86 spi: spi_intel: Fix missing 'break' in case
Coverity scan found issue with a missing 'break' statement.  Fix
push_data by adding the break after handling the 1 byte case.

Coverity CID: 190978
Fixes #13842

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-28 09:33:25 -08:00
Paul Sokolovsky
c2a70a2710 scripts: size_report: Fix output of header break line
Was apparently an artifact of Python2 to Python3 conversion. Led to
printing of literal '='*110i instead of a line of ='s.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-02-28 09:23:16 -08:00
Ruth Fuchss
340fabedbf doc: boards: fix board target
Board target was changed but not updated in documentation.

Signed-off-by: Ruth Fuchss <ruth.fuchss@nordicsemi.no>
2019-02-28 18:19:03 +01:00
Marc Herbert
29c19c1b0f filter-known-issues.py: clarify what "new" means
When building incrementally, filter-known-issues.py reports a varying
and totally different set of "new" issues than when building from
scratch. Warnings for unrelated upstream code disappearing and
re-appearing are especially confusing. Expand the messages a bit to
clarify.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2019-02-28 18:18:30 +01:00
Ioannis Glaropoulos
7926cf24b6 tests: kernel: arm_irq_vector_table: extend the test for nRF9160
This commit extends the arm_irq_vector_table test,
so it can run successfully in nRF9160-based platforms.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 18:17:03 +01:00
Ioannis Glaropoulos
1e74007606 tests: kernel: arm_irq_vector_table: add clock ISR in the IRQ vector
This commit adds the Clock Control Interrupt Service
Routine into the customized vector table, when building
for nRF52X-based platforms. As a result, the interrupts
generated by the clock control will not interfere with
the test.

Fixes #13823.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 18:17:03 +01:00
Ioannis Glaropoulos
3dc81a40bc tests: kernel: arm_irq_vector_table: minor typo and style fixes
Minor typo and style fixes in the test logging, stressing
that the test is applicable for Cortex-M MCUs, in general.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 18:17:03 +01:00
Ioannis Glaropoulos
bc902954e4 tests: kernel: arm_irq_vector_table: refactor custom IRQ settings
In order to make this test easy to extend for additional
Cortex-M-based platforms, we apply the following minor
refactoring to the test:
- we introduce the _ISR_OFFSET macro to denote the offset
  inside the interrupts' vector table (starting from IRQ
  line 0) of the first manually installed ISR.
- we move the asserts that ensure the validity of the custom
  vector table to build-time and place them in the beginning
  of the text, outside source code.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 18:17:03 +01:00
Daniel Leung
ee50b49621 boards: up_squared: turn on PCI enumeration
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-28 18:13:43 +01:00
Ioannis Glaropoulos
dd4754ebe9 arch: arm: nxp: mpu: fix constant expression result errors
This commit fixes two Constant Expression Result errors,
in the NXP MPU driver due to incompatible integer types.

Fixes #13836.
Fixes #13865.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 10:57:37 -06:00
Anas Nashif
29f04767e9 arch: move common app_data_alignment.ld file
This file is being used by different architectures and is not ARC
specific.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-28 08:53:16 -08:00
Charles E. Youse
5dd1bf15fc uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register
The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate
generators. This patch allows a user to specify custom M/N values for
those PLLs when custom/high-speed baud rates are required.

I'm not entirely satisfied with the way the PCP values are configured,
because it requires tweaking data in both Kconfig and DeviceTree. For
the time being I've merely taken my cue from another similar feature
(the DLF register support) and have punted on figuring out the "right
way" to expose UART configuration to the application.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-28 08:50:34 -08:00
Ioannis Glaropoulos
b5578d8de3 arch: arm: various documentation fixes in arm assembly
This commit fixes several essential inline comments in the
core assembly code for ARM, improving code readability.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 10:10:26 -06:00
Ioannis Glaropoulos
d8d52fab2d arch: arm: mpu: fix constant expression result errors in ARMv8-M impl
This commit applies the same fixes, concering the Constant
Expression Result errors identified in the ARMv7-M and the
NXP MPU drivers, into the ARMv8-M MPU implementation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 08:47:43 -06:00
Ioannis Glaropoulos
a94d5587fe arch: arm: mpu: fix constant expression result errors
This commit fixes two Constant Expression Result errors,
in the ARMv7-M MPU driver due to incompatible integer types.

Fixes #13844.
Fixes #13854.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-28 08:47:43 -06:00
Jukka Rissanen
8e066aba0f net: ipv6: Extension header length failure not properly checked
The ipv6_handle_ext_hdr_options() can return negative value
but we stored it into unsigned variable and then checked < 0.

Coverity-CID: 190995
Fixes #13830

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-02-28 08:47:24 -06:00
Jukka Rissanen
a6614a32c1 net: sntp: Remove useless comparison
The LI bits checks is useless as the bitshifted value cannot be
larger than SNTP_LI_MAX (3).

Coverity-CID: 190924
Fixes #13888

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-02-28 08:47:10 -06:00
Jukka Rissanen
2db03ce277 samples: net: socket: can: Do cleanup if failure
If bind() fails or TX thread cannot start, then cleanup the
socket by calling close()

Coverity-CID: 191003
Fixes #13824

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-02-28 08:46:52 -06:00
Jukka Rissanen
4bbcf391c3 net: context: Remove dead code from net_context_connect
The ret=0; statement cannot be reached.

Coverity-CID: 190973
Fixes #13846

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2019-02-28 08:46:09 -06:00
Alexander Wachter
18680e55e5 drivers: can: Fix userspace handler parameter types
Change the parameter types from can_msg to zcan_frame and from
can_filter to zcan_filter.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-28 08:45:44 -06:00
Alexander Wachter
b0826442ee drivers: can: Make zcan_frame const for sending
For sending the zcan_frame can be const, because its only
copied to the registers.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-28 08:45:44 -06:00
Alexander Wachter
8aab2e7bb9 include: can: Fix positive and overlapping error numbers
The error numbers are currently not negative an CAN_TIMEOUT overlapps
with TX errors. Fix that by making the numbers negative and timeout
the first negative number.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-02-28 08:45:44 -06:00
Paul Sokolovsky
d01f75be7e lib: os: fdtable: Add underscore aliases for read/write/close/lseek
These get references by newlib builds in other toolchains, e.g.
gnuarmemb, and lack of them breaks linking. Tested that
tests/posix/fs and tests/posix/common actually work with these
changes.

Fixes: #13906

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2019-02-28 08:45:13 -06:00
David B. Kinder
e731bdc81a doc: fix docs, include, and Kconfig misspellings
Fix misspellings missed during regular reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-02-28 09:32:12 +01:00
Andy Ross
9c2c115716 kernel/spinlock: Predicate spinlock validation on flash size
The spinlock validation isn't super lightweight -- it adds only a few
tens of bytess per call, but there are a LOT of locking calls.  On
smaller platforms with 32kb of flash, we're bumping into code size
limits on the bigger tests (tests/kernel/poll is a particular
offender).

Check the declared flash size before enabling it.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-27 14:22:06 -08:00
Andy Ross
a4614372f9 tests: Mass SMP disablement on non-SMP-safe tests
(Chunk 3 of 3 - this patch was split across pull requests to address
CI build time limitations)

Zephyr has always been a uniprocessor system, and its kernel tests are
rife with assumptions and outright dependence on single-CPU operation
(for example: "low priority threads will never run until this high
priority thread blocks" -- not true if there's another processor to
run it!)

About 1/3 of our tests fail right now on x86_64 when dual processor
operation is made default.  Most of those can probably be recovered on
a case-by-case basis with simple changes (and a few of them might
represent real bugs in SMP!), but for now let's make sure the full
test suite passes by turning the second CPU off.  There's still plenty
of SMP coverage in the remaining cases.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-27 14:22:06 -08:00
Savinay Dharmappa
ade05335b3 tests: counter: Adapt test for the qmsi rtc driver
The qmsi rtc hardware supports a single alarm only and a fixed top
value, so restructure the counter_basic_api test to skip unsupported
features.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-27 12:33:53 -08:00
Savinay Dharmappa
5307953091 drivers: counter: Modify set top value api.
patch modifies the set top value api to return error only
when ticks passed from application is not equal top value
supported by hardware.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-27 12:33:53 -08:00
Andy Ross
dff6b71450 kernel/sched: More nonatomic swap fixes
Nonatomic swap strikes again.  These issues are all longstanding, but
were unmasked by the dlist work in commit d40b8ce1fb ("sys: dlist:
Add sys_dnode_is_linked") where list node pointers become nulls on
removal.

The previous fix was for a specific case where a timeslicing interrupt
would try to slice out the "wrong" current thread because the thread
has "just" pended itself.  That was incomplete, because the parallel
code in k_sleep() didn't flag itself the same way.

And beyond that, it turns out to be basically impossible (now that I'm
thinking about it correctly) to prevent interrupt code from calling
into the scheduler to suspend a "just pended but not quite" current
and/or preempt away to another thread.  In any of these cases, the
scheduler modifications to the state bits remain correct but the queue
nodes may be corrupt because the thread was already removed from the
ready queue.  So we have to test and correct this at the lowest level,
where a thread is being removed from a priq: check that it's (1) the
ready queue and not a waitq, (2) the current thread, and (3) already
marked suspended and thus not in the queue.

There are lots of existing issues filed in the last few months all
pointing to odd instability on ARM platforms.  I'm reasonably certain
this is the root cause for most or all of them.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-27 12:07:34 -08:00
Ulf Magnusson
775993a61a arch: arc: Replace CONFIG_APP_SHARED_MEM with CONFIG_USERSPACE
CONFIG_APP_SHARED_MEM was removed in commit 4ce652e4b2 ("userspace:
remove APP_SHARED_MEM Kconfig").

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-02-27 13:37:53 -06:00
Daniel Glöckner
c9e7a5b6b0 debug: openocd: change how we manage differences between versions
Every time the array of offsets was changed, it was changed in a
backward compatible way by appending elements to the end. The version
number was incremented to inform OpenOCD about the existence of the new
elements. But the patch for OpenOCD to support Zephyr has never been
updated to support anything else than version 0, causing OpenOCD to
reject recent Zephyr versions. So the idea of using a version number to
track compatible changes didn't work out.

Therefore add another symbol that can be read by OpenOCD to get the
number of elements in the array. This value is automatically calculated
during compilation. The version number element should from now on be
incremented only for incompatible changes.

Fixes: #13448

Signed-off-by: Daniel Glöckner <dg@emlix.com>
2019-02-27 13:25:28 -06:00
Ioannis Glaropoulos
8354f4c274 arch: arm: nxp mpu: align MPU disable function with that of ARM MPU
This commit aligns the implementation of arm_core_mpu_disable()
function in NXP MPU with the implementation in the ARM MPU
module, by introducing a Data Memory Barrier, (DMB) instead of
a DSB instruction. This is in accordance with the ARM guidelines
of using the memory protection unit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-02-27 13:24:49 -06:00