This commit updates the definition of z_shared_isr_table_entry
to use _isr_table_entry instead of specially created z_shared_isr_client.
Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
Adds a configurable delay to the test threads. It exists to keep
thread0 from hogging the scheduler's spin lock and giving threads
on another core a better chance to obtain that lock and not starve.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Reduces the number of seconds that the test runs to 15 seconds
(down from 30 seconds). This should still be sufficient time
to determine if there is anything amiss with the synchonous
thread suspend/resume. Furthermore, the test itself has been
tagged as being slow and its timeout increased to 10 minutes
(600 seconds) as some simulators are rather slow.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Instead of using the system heap, we define our own heap in incoherent
memory because stacks should be in cached memory.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The CLIC has different software-triggerable irqs than the PLIC. I
adjusted them.
Additionally, in a clic the the irq flag 0 would mean triggering on a
positive level. To work with software-triggering, the irqs have to
trigger on a positive edge, i.e. 1.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
This extends the smp_boot_delay test to test the newly
introduced function k_smp_cpu_custom_start().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames z_smp_cpu_start() to k_smp_cpu_start().
This effectively promotes z_smp_cpu_start() into a public API
which allows out of tree usage. Since this is a new API,
we can afford to change it signature, where it allows
an additional initialization steps to be done before a newly
powered up CPU starts participating in scheduling threads
to run.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This makes the test a bit more generic so it can run on
other SMP enabled platforms. Though, we don't need CI
running this on every SMP platforms as this is not
testing the mechanism of bringing up a CPU. That is
being tested on the other SMP test. Therefore, only
enable qemu_x86_64 to be testing in CI so that this
feature will still be tested on CI.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This test assumes that nothing will wake the CPU apart from
the timer set by the test.
But that is not necessarily the case.
Some other platform thread started at boot
may be waking the CPU every now and then.
Let's allow for some spurious wakes while we are testing k_cpu_idle,
while at the same time ensuring we are not just busy waiting
all the way.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Because it was exclusively used by the "common" RISC-V privileged code
to build CPU idle routines that are now handled by arch level code.
Also, all platforms defaulted to "y", making it pointless in practice.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This test assumes nothing else is running in the background
but when the logger is on, this board will by default
start the RTC sync mechanism, which will awake the CPU
every now and then.
Let's disable this mechanism to avoid disturbing the test.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Adds a test to stress k_thread_suspend() and k_thread_resume() on
an SMP system. The test should take about 30 seconds.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
- Support for listing both testcases and testsuites
- Support for running single suites or single test cases
- Support shuffling tests and repeating execution based on command line
arguments.
For example, build with
west build -p -b qemu_cortex_m3 tests/kernel/sleep -t run -- \
-DCONFIG_ZTEST_SHUFFLE=y -DCONFIG_ZTEST_SHELL=y
Following commands are available:
uart:~$ ztest
ztest - Ztest commands
Subcommands:
run-all :Run all tests
shuffle :Shuffle tests
list-testsuites :List all test suites
list-testcases :List all test cases
run-testsuite :Run test suite
run-testcase :Run testcase
shuffle accepts two arguments --suite_iter and --case_iter which allows
repeated exercution of testcases or suites.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduce a new arch level Kconfig option to signal the implementation
of the RISCV Privileged ISA spec. This replaces
SOC_FAMILY_RISCV_PRIVILEGED, because this is not a SoC specific
property, nor a SoC family.
Note that the SoC family naming scheme will be fixed in upcoming
commits.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
tag nano libc tests with nano so we can exclude them if needed. Now they
cause issues when collecting coverage information from tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Reworked and combined the multi-level interrupt bit masks tests
to work on any configuration of bits in every level.
Updated the bits configuration in the testcase to use
non-symetric numbers so that shifting a level with the wrong
number of bits will certainly cause the test to fail.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
With MMU enabled on Xtensa, user_buffer is not marked as
executable. Invalidating the i-cache by region will cause
an instruction fetch prohibited exception. So skip all
i-cache tests, instead of just the range ones to avoid
confusions of only running the test partially.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
As the pointer to the data buffer passed to k_pipe_put() is now a
'const', that buffer must be initialized before calling k_pipe_put()
to avoid a compiler warning.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
This follows the idea to remove any z_ prefix. Since MMU has
a large number of these, separate out these changes into one
commit to ease review effort.
Since these are no longer have z_, these need proper doxygen
doc. So add them too.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
How cache test could be ran without CONFIG_CACHE_MANAGEMENT?
Adding qemu_x86/x86_64 as cache related API in x86 has proven to be
very brittle against changes recently: no test was at least verifying
it builds properly, not to mention running it.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Updated the tests to use info from the devicetree or Kconfig as
ground truth and compare that with the output from the
functions under test.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Assert that the `local_irq` of each levels should only ranges
from `0` to `CONFIG_MAX_IRQ_PER_AGGREGATOR`, so that it doesn't
overflow the other aggregators.
Also, assert that the output of `z_get_sw_isr_table_idx` shouldn't
overflow the ISR table.
Update the `sw_isr_table` tests to test the range of
`CONFIG_MAX_IRQ_PER_AGGREGATOR` instead of the entire range of
level bits.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Split the `sw_isr_irq_parent_table` test into one that tests
the IRQ table index function which is generic and should
always be tested, and one that tests multi-instance -related
functions which only work in interrupt controller drivers that
has multi-instance implementation.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This option (CONFIG_HEAP_MEM_POOL_SIZE) is not used for the tests.
Moreover it overrides the option, specified in the board's Kconfigs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Test consistently fails with timeout for board `hifive1`, so exclude
this board until fixed.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This board have an NXP MPU with 8 configurable regions, of which five
of them are already used by the static MPU configuration. Many of
these tests are failing due to lack of MPU regions or free partition
slots available, even when HW stack protection is disabled when
building with userspace support.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
When testing k_busy_wait(100), don't require that at least 100µs of CPU
time be consumed by the thread itself; some of that time may be used
elsewhere in the system. Instead, just make sure that at least 80µs is
accounted to the thread and allow 20µs to get used elsewhere.
Signed-off-by: Keith Packard <keithp@keithp.com>
Swith integration_platforms from native_posix(_64)
to native_sim(_64).
And replace it also in a comment.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This test needs to include zephyr/kernel/mm/demand_paging.h, not
zephyr/kernel/mm.h, due to its use of k_mem_pin().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This moves including of demand_paging.h out of kernel/mm.h,
so that users of demand paging APIs must include the header
explicitly. Since the main user is kernel itself, we can be
more discipline about header inclusion.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
qemu_x86_tiny has very limited memory resources; if too much text is
included in this test, it will not have enough remaining memory to run
it.
When using picolibc before 1.8.5, the only way to get 'long long' support
was to use the full version, including floating point support. This is too
large for this testcase.
Reduce the size of the printf code by switching to the version without
64-bit integer support. This allows the test to pass when using older
picolibc versions, such as that included with SDK version 0.16.3.
Signed-off-by: Keith Packard <keithp@keithp.com>
This enables tests/kernel/mem_protect/mem_protect to be tested
on Xtensa.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This test requires architecture specific code to work.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In minimal mode, format modifiers are not supported, leading to a lack
of width and precision support.
long long values are presented correctly in either long long or floating
mode.
Signed-off-by: Keith Packard <keithp@keithp.com>
This moves the k_* memory management functions from sys/ into
kernel/ includes, as there are kernel public APIs. The z_*
functions are further separated into the kernel internal
header directory.
Also made a quick change to doxygen to group sys_mem_* into
the OS Memory Management group so they will appear in doc.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change the stdev tolerance stdev from 10 to 33 when npcx timer is used.
This is because the clock source of npcx event timer, which is used to
generate the timeout interrupt, is running at 32.768 KHz.
(i.e. 1 count = ~30.5 us.) The conversion from the absolute system timer
to the event timer count might have -30.5 ~ 30.5 deviation.
The tolerance setting is under the assumption that test sampes are
evenly located at 1030.5 and 969.5 for the worst case.
Fixes#59594
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
`test_isr_dynamic` for `CONFIG_GEN_SW_ISR_TABLE=n` was somehow
overlooked in commit b7f1e98724.
I'm disabling the irq at the end of the test. The babblesim for the
`nrf5340bsim_*` target walked into a timeout otherwise.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Relocate new and existing internal software-managed table
access functions from the public `sw_isr_table.h` into a
private header that should only be accessed internally.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Validate the following functions in the sw_isr_table:
- z_get_sw_isr_table_idx
- z_get_sw_isr_device_from_irq
- z_get_sw_isr_irq_from_device
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Disable the quadspi mpu region of the nucleo_f746zg
when testing the samples/userspace/shared_mem
or tests/kernel/mem_protect/userspace
The stm32f7 cortex M7 has 8 MPU regions and the one for quadspi prevents
the testcase to PASS.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Replace combination of printk() and TC_PRINT() to LOG_DBG() disabled
by default so that it does not affect execution time.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Most of the local functions are static, make code consistent by making
remaining functions static as well.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Since userspace is not enabled change ZTEST_USER to ZTEST to not
confuse people, other tests are also ZTEST.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The test_multi_thread_send_get() test sends and receives mbox messages
with K_FOREVER as timeout, so k_sleep() is not needed here.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
k_mbox_get() / k_mbox_put() get timeout as is, so there is no need for
extra code. Also check that k_mbox_put() actually sends message.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Added test to verify that the value of atomic_t will be the same
in case of overflow if incremented in atomic and non-atomic manner
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Added test to verify the spinlock acquisition fairness
in relation to the CPUs contending for the spinlock.
This test is only enabled for Ticket Spinlocks which
required to provide such kind of fairness.
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Relocate multi-level interrupts APIs out of `irq.h` into
a new file named `irq_multilevel.h` to provide cleaner
separation between typical irq & multilevel ones.
Added preprocessor versions of `irq_to_level_x` as `IRQ_TO_Lx`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
There are many TC_PRINT()'s in the work_queue test and it make sense
to change them to LOG_DBG() which are disabled by default. Other issue
is that some of TC_PRINT() are inside works for which execution time
is measured.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Increase the size of the thread stacks used by the obj_core tests
by CONFIG_TEST_EXTRA_STACK_SIZE bytes. This is useful to prevent
stack overflow/corruption when options such such as
"--coverage --gcov-tool gcov"
are applied to twister runs.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
These tests cannot be run in this architecture as it does not
support userspace.
Today they are filtered by kconfig, which works but spends
time running cmake.
As native_posix is a default test platform it is better
to filter it alltogether by arch, which saves quite a lot
of time.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Compiler can't tell that k_thread_abort() won't return and issues a
warning unless we tell it that control never gets this far.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This reverts commit 341590545a, the issue
has been fixed in e1647e35c0, tested with
west build -t run -p -b qemu_riscv32_xip \
-T tests/kernel/xip/arch.common.xip
west build -t run -p -b qemu_riscv32_xip \
-T tests/kernel/xip/arch.common.xip.minimallibc
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
rand32.h does not make much sense, since the random subsystem
provides more APIs than just getting a random 32 bits value.
Rename it to random.h and get consistently with other
subsystems.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When the timer frequency is known at compile time, make sure we can use any
time conversion macro as a global initializer.
Signed-off-by: Keith Packard <keithp@keithp.com>
The `test_1cpu_drain_wait` tests iff the thread of a work queue
that is waiting to be drained can submit work item to the
queue. A timer is created with a callback funciton to submit a
work item to the same queue, to help demonstrate that behavior.
However, the work item submitted by `test_drain_wait_cb` to the
`coophi_queue` isn't initialized, and can hit assertion if it
is processed by the work queue.
Fixes#63559
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Add qemu_leon3 target to the tests that list below. These set
CONFIG_MULTITHREADING=n.
- tests/kernel/mem_heap/mheap_api_concept
- tests/kernel/mem_slab/mslab_api
- tests/kernel/threads/no-multithreading
- tests/kernel/timer/timer_api
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Changing the name of the routine test_obj_core_stats_deregister()
to something shorter (test_obj_core_stats_dereg) has been found to
be a workaround to the issue identified in #61087.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Creates a set of tests to verify that the top-level
k_obj_core_stats_xxx() routines behave as expected.
Note that this test is not meant to test the details
of the object core statistics operator function pointers.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Before Picolibc was made default, this board needed a custom test
faulty address. Now this address does not produce a fault anymore so
switch back to the default faulty address.
Fixes#63270
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This is a follow-up to commit 4cc21e2f4a.
That short sleeping before starting the test was removed together with
accuracy improvements (specifically, with moving of the first readout
of the cycle counter). Nevertheless, this tick alignment it still
needed, as without it in specific conditions the test may undesirably
fail.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This adds a function k_object_is_valid() to check if a kernel
object exists, of certain type, and has been initialized.
This replaces the same (or very similar) code that has been
copied from kernel into the network subsystem.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
All of the time_units conversion routines are now macros which means the
test cannot reference them as functions. Instead, create local static
functions which call each one of them and use those instead.
Signed-off-by: Keith Packard <keithp@keithp.com>
On Intel boards (like intel_ehl_crb and intel_rpl_s_crb) for the
trylock_test some part is executed very fast and since there is no
synchronization, there might be situation when there is no
trylock_failures. Increasing time spend in this part fixes the issue.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch shows an example of how to use the timer behavior external
tool testing, using the Saleae Logic 2 application.
Also, some board overlays were added as examples.
Finally, testcase.yaml updated with parameters for the Saleae sample.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This patch adds a way to simplify using an external tool to measure
timer behaviour on Zephyr. It modifies the timer behaviour
jitter_drift.c tests to toggle a GPIO pin (defined via a new DTS
compatible, "test-kernel-timer-behavior-external") that can be connected
to an external tool, such as a logic analyzer, to measure timer
behaviour.
This GPIO pin toggle is behind a new CONFIG_TIMER_EXTERNAL_TEST Kconfig.
A new pytest test is added so that it can collect the statistics from
the external tool and assert some measurements. To collect statistics
from the external tool, one needs to provide a Python module which
provides a `run(seconds, config)` method, that will perform the test and
return the statistics. Check the README file for more information about
this interface.
Finally, this on twister, this new test is behind a new fixture,
"gpio-timerout".
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This board seems to have issue with data alignemnt after 843f66f and is
failing in CI. Exclude it while the problem is investigated.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Let's make this official: we use the suffix `_MASK` for the define
carrying the GENMASK for the attributes, and the suffix `_GET(x)` for
the actual macro extracting the attributes.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The test_sem_take_timeout_isr depends on the thread's priority. But for
SMP platforms, the priority is different with no-SMP. High-priority
threads and low-priority threads might run simultaneously at different
cores. Set the test case run at 1cpu to fix such an issue.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
The heap size is not enough so that it will cause the testcase fail.
Increase to 32k to make sure it works for a long time in the future.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
The test assumed that interrupt line 5 was up for grabs, but it
is not in general. (For ex., on an nrf53_bsim this is the clock
interrupt, which cannot be hijacked).
Instead, for boards that define it, let's use the int line
used for offloading SW interrupts (which is defined for all posix
arch boards in tree)
And if this is not defined, let's skip the test.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The mr_canhubk3 board enables by default an off-chip watchdog that must
be serviced to avoid triggering a reset and cannot be disabled on a
per-test basis.
test_all_stats_usage assumes the CPU was never idle before the test
starts but this is not the case for mr_canhubk3 because the off-chip
watchdog driver has a thread kicked off during device init that will
conflict with the expected usage stats on this test. So skip this test
for this board.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The _EXPIRED macro is no longer necessary. It is a relic of an older
timeout processing algorithm from several years ago.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Zephyr device and device.pm tests uses device tree fragments applied
to main board device trees. For xenvm they have conflicting
address/size cells definition with board DT. It leads to CI and test
issues during build (xenvm has 0x2 cells, tests have 0x1).
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
In test_kobject_perm_error, there are 13 kobjects to test but
the loop only do 12. So amend the code to test all 13 kobjects.
Also remove the parameter of tid to child thread as the child
thread is not using it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This header does not expose any public APIs, so move it under
kernel/include and change files including it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently spinlock internals are directly accessed from the tests.
This way the test becomes bound to the particular spinlock implementation.
To remove this unnecessary dependency the distinct API to check if spinlock
is locked is introduced.
k_spin_is_locked should be used for the spinlock testing only,
so the scope of this API is intentionally restricted.
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
With picolibc being the default C library, we need to explicitly include
testing against the minimal C library for kernel components.
Signed-off-by: Keith Packard <keithp@keithp.com>
Modify the signature of the k_mem_slab_free() function with a new one,
replacing the old void **mem with void *mem as a parameter.
The following function:
void k_mem_slab_free(struct k_mem_slab *slab, void **mem);
has the wrong signature. mem is only used as a regular pointer, so there
is no need to use a double-pointer. The correct signature should be:
void k_mem_slab_free(struct k_mem_slab *slab, void *mem);
The issue with the current signature, although functional, is that it is
extremely confusing. I myself, a veteran Zephyr developer, was confused
by this parameter when looking at it recently.
All in-tree uses of the function have been adapted.
Fixes#61888.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Fix few mismatched CONTAINER_OF, going from struct k_work to struct
triggered_test_item should pass by struct k_work_poll.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix few instances of delayable work handlers using the k_work pointer
directly in a CONTAINER_OF pointing to a k_work_delayable.
This is harmless since the k_work is the first element in
k_work_delayable, but using k_work_delayable_from_work is the right way
of handling it.
Change a couple of explicit CONTAINER_OF doing the same work as the
macro in the process.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
CONFIG_COVERAGE has been incorrectly used to
change other kconfig options (stack sizes, etc)
code defaults, as well as some samples behaviour,
which should not have dependend on it.
Instead those should have depended on COVERAGE_GCOV,
which, being the one which adds special code and
temporary RAM storage for embedded targets,
require changes to many features.
When building for the native targets, all this was
unnecessary.
=> Fix the dependency.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This test fails when icount is disabled, so enable it
See 7bdc621ba9 which disabled icount by
default for this platform.
Signed-off-by: Keith Packard <keithp@keithp.com>
Some 64 bit platforms do not have MMU, however the 64 bit platfoms need
a larger stack. This testcase fails with non-MMU 64 bit platform e.g.
v8r64 platform due to the stack overflow. To fix this issue, set 2k
stack for all 64 bit platforms (CONFIG_64BIT) as this is likely a common
issue for all non-MMU 64 bit platforms.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
The heap size is set to 20000 which is just not enough for v8r platform.
Fix testcases failure in tests/kernel/threads/ by increasing the heap
size to 21504.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
This follows the same convention that has already been adopted by Intel
Alder Lake and Raptor Lake boards.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The original issue is fixed some time ago, so re-enable the
test.
This reverts commit 52992b0658
("tests: skip the cpu_idle test for nsim_hs_smp")
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.
Signed-off-by: Joshua Lilly <jgl@meta.com>
Adding a new simple test that checks that canaries values
are different between threads when CONFIG_STACK_CANARIES_TLS
is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Introduce new API to compare two timepoint values to
find the one that is going to expire sooner, or is already
expired.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
The test_trylock reuses the cpu1_thread, but there is no way for it to
exit. This will cause the thread created twice, as a result, two cpu
running the same thread simultaneously cause an unexpected crash.
Fix this by adding initialization of resources and also the exit for the
cpu1_thread.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
