Commit graph

7 commits

Author SHA1 Message Date
Alberto Escolar Piedras
fb38b90481 tests kernel: Exclude posix arch for userspace tests
These tests cannot be run in this architecture as it does not
support userspace.
Today they are filtered by kconfig, which works but spends
time running cmake.
As native_posix is a default test platform it is better
to filter it alltogether by arch, which saves quite a lot
of time.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-10-24 09:05:29 +02:00
Gerard Marull-Paretas
93b63df762 samples, tests: convert string-based twister lists to YAML lists
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-10 09:52:37 +02:00
Filip Kokosinski
19fc1ee77c subsys/random: change parameters for timer-based PRNG
PR #36996 disabled running mem_protect/stack_random test on qemu_riscv32
platform because of this test consistently failing on said platform.
This test starts new threads in equal time intervals, and because of
that we get repeating values after performing the modulus operation when
calculating the stack pointer address.

This can be solved by changing the value of the _RAND32_INC constant
that is used to increase the value returned by the timer-based PRNG.

This commit decreases the value of the mentioned constant from
1000000013U to 1000000003U.

Fixes #37006.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2021-08-30 09:32:36 -04:00
Christopher Friedt
a87a5ea22b tests: kernel: mem_protect: stack_random: disable qemu_riscv32
Test fails consistently in CI but local builds succeed. Puzzling. In
order to keep main green, disabling this test only for qemu_riscv32
until a solution is found.

```
% west build -p always -b qemu_riscv32 -t run \
  tests/kernel/mem_protect/stack_random
...
*** Booting Zephyr OS build zephyr-v2.6.0-1039-g523764b3fd75  ***
Running test suite stack_pointer_randomness
===================================================================
START - test_stack_pt_randomization
Test Stack pointer randomization
stack pointer changed 13 times out of 64 tests
 PASS - test_stack_pt_randomization in 0.5 seconds
===================================================================
Test suite stack_pointer_randomness succeeded
===================================================================
PROJECT EXECUTION SUCCESSFUL
```

```
*** Booting Zephyr OS build zephyr-v2.6.0-1063-g0106d8f2a391  ***
Running test suite stack_pointer_randomness
===================================================================
START - test_stack_pt_randomization
Test Stack pointer randomization
stack pointer changed 0 times out of 64 tests
 Assertion failed at WEST_TOPDIR/zephyr/tests/kernel/mem_protect/\
  stack_random/src/main.c:68: test_stack_pt_randomization: \
  (sp_changed equal to 0)
 Stack pointer is not randomized
FAIL - test_stack_pt_randomization in 0.6 seconds
===================================================================
Test suite stack_pointer_randomness failed.
===================================================================
PROJECT EXECUTION FAILED
```

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-07-16 14:48:21 -04:00
Kumar Gala
53b104d461 tests: kernel: Add missing kernel tag to tests
Add kernel to any testcase.yaml files that happen to be missing for
tests under tests/kernel/

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-05 14:52:55 -05:00
Anas Nashif
1609f251ee tests: kernel: style, tag, and category fixes
Fix coding style, test tags and use categories.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-04-25 14:18:15 +05:30
Andrew Boie
83752c1cfe kernel: introduce initial stack randomization
This is a component of address space layout randomization that we can
implement even though we have a physical address space.

Support for upward-growing stacks omitted for now, it's not done
currently on any of our current or planned architectures.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-03-16 16:25:22 -07:00