Commit graph

79 commits

Author SHA1 Message Date
Ederson de Souza d497cca845 tests/boards/intel_adsp/smoke: Wait for host script to be ready
These tests work in tandem with the cavstool.py script: the script
receives IPC messages and properly acts on them. However, it may take
some time to the script execution arrive at the point in which it's
ready to receive incoming messages. This patch makes the test code wait
some arbitrary time to allow the script to reach the desired state.

Note that another IPC message could be used to this end, but since some
tests are actually testing the IPC mechanism, it seems unwise to assume
IPC works for set up steps.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-28 14:56:57 -04:00
Tom Burdick 81f3803927 dma: HDA DMA API test use alignment property
Use the DMA_BUF_ALIGNMENT macro and property in the hda test case.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-06-27 12:46:11 +02:00
Tom Burdick 1b1f0bb12b dma: HDA smoke test buffer alignment from DTS
Use the device tree defined buffer alignment for the smoke test.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-06-27 12:46:11 +02:00
Andy Ross 5139d052d8 tests/intel_adsp/smoke: Revert WAIT_FOR breakage
The evolution of the original WAIT_FOR trick in this test, first to
move it to a generic spot and then to make it take a delay
paramatrization, have had the unfortunate side effect of breaking the
original usage.

And... it's really not following the design intent anyway.  The idea
here was to spin hard waiting on external hardware (a python script
running on the host) to deliver an interrupt.  Both of the new tricks
(suspending the thread with a sleep and hammering the HDA wall clock
for time) can affect interrupt delivery.

Just restore the original implementation (albeit with a new name,
"AWAIT", since the original was stolen) until someone has a chance to
make this work properly with the new API.  There's no reason it can't,
it just doesn't yet.

Fixes #43828

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-06-07 18:58:00 +02:00
Ederson de Souza 3209bc1a4a soc/xtensa/intel_adsp/tools: Make cavstool.py DSP resetting more stable
When using more than one core on cavs25, some hangs were made
"persistent", as it seems not all cores were being properly reset, thus
compromising tests - if a test hangs for any reason, subsequent tests
that were not restrict to a single CPU would also fail.

This patch mitigates these issues by two changes:
  - Closely mimics SOF Linux driver way of loading the firmware. So,
    explicit stall and reset (and "unstall" and "unreset") of cores, with
    appropriate checks that states have been reached;
  - More generous sleep before resetting the stream.

Also, the status of ADSPCS (Audio DSP Control and Status) register is
logged more thoroughly to aid debugging in case new issues arise.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-06-07 11:51:37 +02:00
Fabio Baltieri e24314f10f include: add more missing zephyr/ prefixes
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-05-27 15:20:27 -07:00
Tom Burdick 012836aeef tests: hda_log: cav15 timeout fixes
Fixes issues caused by the hda_log test for cavs15 caused by ipc
messaging issues. Wait for the ipc message to complete immediately after
sending it.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-05-17 11:12:57 -05:00
Gerard Marull-Paretas ade7ccb918 tests: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:02:14 +02:00
Maureen Helm f4a0854481 drivers: dai: Use dt_compat_enabled for Intel SSP driver default
Enables the Intel SSP driver by default when the DAI driver class is
enabled (CONFIG_DAI=y) and a compatible devicetree node
("intel,ssp-dai") is enabled.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-05-06 11:32:04 +02:00
Tom Burdick 6913da9ddd logging: cAVS HDA based logger
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.

The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-05-04 18:56:13 -04:00
Maureen Helm 5769dffc01 drivers: mm: Use dt_compat_enabled for Intel ADSP TLB driver default
Enables the Intel TLB driver by default when the MM driver class is
enabled (CONFIG_MM_DRV=y) and a compatible devicetree node
("intel,adsp-tlb") is enabled.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-04-25 11:41:31 -07:00
Tom Burdick 2f320730a1 dma/cavs_hda: Adds link in/link out compatibles
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-18 19:19:40 -04:00
Jaska Uimonen 03e335ca6a tests: drivers: ssp: add ssp dai tests
Add tests for Intel dai ssp driver. These tests configure
the ssp driver and transfer data over loopback with dma.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-04-14 11:42:08 -04:00
Jaska Uimonen 8d38b64fdc drivers: dai: add dai driver subdir and ssp driver
Add Intel ssp driver using dai interface.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-04-14 11:42:08 -04:00
Yuval Peress 5416abfe5f util: convert wait_for macro to uppercase
This macro conflicts with C++'s std::condition_variable::wait_for
and makes it very difficult to use Zephyr with C++. Replace it with
an all uppercase name which fits the naming standard better.

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-04 09:50:28 -05:00
Tom Burdick 602ef3fb0e soc/intel_adsp: Require definitions for cavs_hda.h
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick e018a3dff7 dma/cavs_hda: DMA driver for HDA on cAVS
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.

Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF

Simple test case is provided for both drivers.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick cc6e9c094a soc/intel_adsp: Low level HDA driver and tests
Adds a header only low level driver for HDA streams along with smoke
tests to ensure basic host in and out stream functionality.

The tests require host side interaction. In cavstool a new HDAStream
class encapsulates somewhat a single stream and its registers. This
is manipulated in the tests using IPC with the Host ensuring that a
specific order of operations is done.

This low level driver allows testing certain hardware configurations
and flows with easy to use register dump debugging. It is not
intended to be the end API an application might use. That would be
a DMA driver using this.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick 345a536794 soc/intel_adsp: common testing code in cavstool.h
The IPC enum definition and WAIT_FOR macro are useful outside of
the board smoke tests for intel_adsp. They can be commonly used
by other board tests for a variety of peripherals that require
DSP and Host interaction (using cavstool).

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-01 09:12:20 -04:00
Tom Burdick c3c6bf9f2a tests/boards/intel_adsp: CPU halt timeout test fix
Smoke test was timing out in a WAIT_FOR macro on my up xtreme tgl board.
Enabling this sleep fixes it.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-03-07 12:00:23 -05:00
Andy Ross fd929f5190 tests/boards/intel_adsp: Add ipm_cavs_host test
Add a fairly simple test of the IPM-over-IPC driver.  This hits all
the code, but works by implementing the host side of the protocol
partially in the C test code.  The message is sent with an initial
payload, and then IPC commands from the firmware copy the data over
into the "inbox" region to simulate data being sent via the host.
Then we make sure it lands correctly as if the host driver had done it
directly.

This requries a new command in the cavstool script that will copy a
word from the "outbox" region to the "inbox" region (both are just
different SRAM windows, conceptually no different than the way the
script is already managing log output), but no significant surgery.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 3da9c9213e tests/intel_adsp: Add clock calibration test
Now that we have easy access to code on the host, it's trivial to
check the clock against host timestamps with high precision.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 45242d9214 tests/intel_adsp: MP core power fixups for older cAVS platforms
On cAVS before 2.5, core power was controlled by the host.  Add a
command to the cavstool.py script to allow us to do that under test
command so we can exercise multiprocessor startup/shutdown outside of
SOF.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 438219c466 tests/intel_adsp: Force cpu_halt case to run on CPU 0
This test obviously only works correctly if it's run from core 0 (the
only CPU that doesn't shut down).  It was true essentially by
accident, but add some cpu_mask trickery to force things.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross ae499454a1 tests/intel_adsp: Move IPC commands into shared header
It's useful for tests other than the IPC case to be able to
communicate with the script on the host, so generalize the interface
and move it to tests.h.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 4d4687dfe1 tests/boards/intel_adsp/smoke: Add cpu halt/restart case
Add code to exercise soc_adsp_halt_cpu() and validate the cores can be
restarted with the kernel z_smp_start_cpu() API.

Note that this interface is for 1.8+ devices only.  On cAVS 1.5, the
core power is actually controlled by the host.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 0fb42d84c7 tests/boards/intel_adsp/smoke: Add board hardware features smoke test
These are descended from a private collection of test rigs I've been
semi-curating.  Getting cache, clock and memory space setup consistent
is mildly complicated on these devices and we've had bugs in all these
areas.

+ Check cache/uncache memory space setup, and make sure that the
  incoherent cache is operating as expected.

+ Make sure all cores agree with clocking setup.

+ Quickly benchmark a two-instruction loop to detect messups with
  instruction caching.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 318aecb86f tests/boards: Add intel_adsp board integration/smoke test
As Zephyr begins to absorb drivers for these platforms that had
previously been managed by the SOF app, there's a need for a rapid
board-specific smoke test to use during development.

This starts with the smp_boot_delay test (itself a unit test for a
SOF-derived feature) and adds a host IPC case (that needs to match
code in cavstool.py on the other side of the PCI bus!).

It will grow more features over time as needed.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-03-01 09:59:15 -05:00
Andy Ross 96b4a86a51 test: boards/intel_adsp: Add test of adsp_mem API
Add a simple board-specific test of the memory mapping driver.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00