Commit graph

5 commits

Author SHA1 Message Date
Lucas Tamborrino
4f1fd56b36 tests: boards: espressif: add esp32s3 to cache coex test
Test esp32s3 for cache coexistence. Update test documentation.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-07-26 14:42:20 +02:00
Marek Matej
3776402f40 boards: xtensa: esp32 board split
Remove virtual esp32 board and replace it with the
real word boards:

- esp32_devkitc_wroom
- esp32_devkitc_wrover (with PSRAM option)

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Andrei Emeltchenko
98580f1c22 tests: espressif_esp32: Fix docs generation issue
Fixes following bug:
...
Warning, treated as error:
../espressif_esp32/cache_coex/README.rst:4:Title underline too short.
...

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-08 18:33:21 +02:00
Andrei Emeltchenko
5d2d1fba86 doc: tests: trivial: Add missing line
Fix README.rst.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-05 12:02:17 +00:00
Glauber Maroto Ferreira
ee6b33feeb esp32: cache: test: add Flash/SPIRAM cache test
Add SPI Flash/SPI RAM coexistence test.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-06-29 11:32:32 -04:00