We've reversed core launch order to workaround issue of
ARConnect initialization interfere with secondary cores
startup (we don't want to workaround it in runtime as it's
only possible in case of debug session).
However it bring us new issues with the simulation run:
- mismatch arcnum (core ID) with ARConnect ID
- mismatch arcnum (core ID) with CPU name in nSIM instruction traces
To avoid these issues let's use direct core order for simulation
runs.
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Bump number of cores limit in mdb west runner.
As we are here - adjust core number in runner test closer to
the limit.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This significantly improve user experience as 32 bit mdb binary
require to install multiple libraries before it can be used on
modern linux distros.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Add hostlink-awareness to mdb-hw runner. The mdb-nsim and arc-nsim
runners (as well as cmake scripting for nSIM boards) doesn't require
any changes.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Currently we just pass in case of the unsupported jtag adapter
is selected. Fix that by rising ValueError as we do in case of
other incorrect arguments.
While I'm at it add few missing test-cases for mdb west runners.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Currently, in case of multi-core target or in case jtag adapter
auto-selectio, we pass unexpected empty argument (empty quotes `''`)
to MDB binary due to argument generation error.
Fix that.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Remove code which looking for `cld` process pid - this functionality
isn't use anymore by twister. And as manual MDB termination is also
fixed now this functionality isn't required for anything now.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Currently we try to start MDB (MetaWare Debugger) in background
with ignored sigint no matter if we are planing to do debug
session (via `west debug`) or just run something on HW or on
nSIM (via `west flash`)
That cause really bad user experience as after we do
`west debug` or `west flash` we can't terminate the debugger
from the console. Moreover even if we terminate the debugger
process from separate terminal the console stil would be
broken so we need to do `stty sane` in it to make it usable
again.
Fix all that by proper starting the debugger process.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Disables allowing the python argparse library from automatically
shortening command line arguments, this prevents issues whereby
a new command is added and code that wrongly uses the shortened
command of an existing argument which is the same as the new
command being added will silently change script behaviour.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Make the build folder the place where MDB is run. Otherwise mdb
will store the .sc.project folder in the place where twister is
launched (so .sc.project folder will be shared across the runs)
For that we add **kwargs argument to popen_ignore_int method
so we can pass a cwd argument to the Popen constructor.
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
The ARConnect Inter-core Debug Unit (ICD) provides
additional debug assist features in multi-core scenarios.
In master core(core 0) initial stage, we will program ICD to halt
all other cores based on a halt occurring in one ore more core.
And all cores are in halt mode on reset, so we need to make
sure other slave cores have launched and in running mode
before we enable ICD in master core.
Currently we launch master first, Let's reverse the launch
order, launch master last, to make sure slave cores have
launched before we program and enable ICD.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Record MDB's CLD process pid to file so this process can be
terminated by sanitycheck infrastructure.
Update mdb runners test to be able to handle changes.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
mdb runner is quite special as it can be used to run Zephyr on
both simulator (nSIM) and real hardware.
However it is really misleading as same command (west flash)
will run Zephyr in simulation for one board and try to run it
on HW for another board. Things are getting worse for boards
supporting both runs in simulation and on real hardware.
Let's split mdb runner for mdb-hw (for runs on HW) and mdb-nsim
(for runs in simulation) runners.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
