With I3C, when a controller does a read whether, through a private transfer
or a CCC, the target is responsible for issuing the End of Data through the
T bit, but the way the API is currently implemented, there is no way to
communicate this back up. For example, if a controller tries to read 100
Bytes (where the controller is to do an abort after 100 (or 101 bytes))
from a Target and the Target gives the EoD at the 42nd Byte, then there is
no way to currently know where the EoD occurred and how far it can be read
up to in the provided buffers.
This implements a num_xfer for `i3c_msg` and `i3c_ccc_payload` which the
driver is responsible for writing the total number of bytes transferred.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
For example, if a driver needed to reserve address before it does a
ENTDAA, it would need to get free address in a loop, but the get
free address func would return the same address everytime. It needs
the start address, which would be the last free address it go, to
be passed in to get the next free address.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This polishes the doxygen doc on I3C API to make it,
hopefully, more usable. Fixed some typos too.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are some needs to attach and reattach i3c/i2c devices at runtime
Some I2C devices can have special registers where the address can be
changed at runtime. Also some I3C devices can be powered off at runtime
freeing up the address space they take up. These new APIs allow for these
to be changed at runtime. This also moves some config/data in to a common
i3c config/data structure which would allow the api to operate on to be
common for all I3C drivers.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When generating an array of devices with I3C_DEVICE_ARRAY_DT_INST
and I3C_I2C_DEVICE_ARRAY_DT_INST when the number of devices is
greater than 1, a comma was not inserted between each struct with
macro. This would give an error preventing compiling.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Some controllers will "automatically" NACK any read request to them
if there is no data in the TX FIFO. This would prevent use of the callback
function read_requested_cb which is expected to be called from an ISR.
i3c_target_tx_write was added to give applications a direct way to load
data in to the tx fifo.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the bits to allow an I3C controller to act as target
device. This is modelled after the I2C target model.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>