Commit graph

44 commits

Author SHA1 Message Date
Pieter De Gendt 99366dd2be linker: Add ROM_SECTIONS location
Currently iterable sections as per the documentation are added with
zephyr_linker_sources(SECTIONS ...) after bss/noinit.
This commit allows putting sections after common-rom.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-06-20 12:08:58 -04:00
Daniel Leung 2d2bbc05d6 kernel: mm: rename Z_VM_KERNEL to K_MEM_IS_VM_KERNEL
This is part of a series to move memory management functions
away from the z_ namespace and into its own namespace.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-06-12 21:13:26 -04:00
Daniel Leung db9d3134c5 kernel: mm: rename Z_MEM_PHYS/VIRT_ADDR to K_MEM_*
This is part of a series to move memory management functions
away from the z_ namespace and into its own namespace. Also
make documentation available via doxygen.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-06-12 21:13:26 -04:00
Yong Cong Sin e54b27b967 arch: define struct arch_esf and deprecate z_arch_esf_t
Make `struct arch_esf` compulsory for all architectures by
declaring it in the `arch_interface.h` header.

After this commit, the named struct `z_arch_esf_t` is only used
internally to generate offsets, and is slated to be removed
from the `arch_interface.h` header in the future.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin 3998e18ec4 arch: rename all esf struct to struct arch_esf
Rename every architecture's esf struct to `struct esf`.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin 1cd6dd16c1 arch: Create include/zephyr/arch/exception.h
Create `zephyr/include/zephyr/arch/exception.h`, which will
redirect to the corrent architecture-specific exception header
based on Kconfig.

Some of the architectures define their esf struct in
architecture-specific `arch.h`, refactor them out into a
separate `exception.h`.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Mathieu Choplain 8aa6ae43ce llext: add support for SLID-based linking
This commit introduces support for an alternate linking method in the
LLEXT subsystem, called "SLID" (short for Symbol Link Identifier),
enabled by the CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID Kconfig option.

SLID-based linking uses a unique identifier (integer) to identify
exported symbols, instead of using the symbol name as done currently.
This approach provides several benefits:
 * linking is faster because the comparison operation to determine
   whether we found the correct symbol in the export table is now an
   integer compare, instead of a string compare
 * binary size is reduced as symbol names can be dropped from the binary
 * confidentiality is improved as a side-effect, as symbol names are no
   longer present in the binary

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-06-03 15:29:34 -04:00
Yong Cong Sin bbe5e1e6eb build: namespace the generated headers with zephyr/
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.

Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.

Updated the includes path of in-tree sources accordingly.

Most of the changes here are scripted, check the PR for more
info.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-28 22:03:55 +02:00
Flavio Ceolin 4d85f3d91c pm: Deprecate z_pm_save_idle_exit
Deprecate z_pm_save_idle_exit and promote pm_system_resume.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-05-27 02:10:03 -07:00
Dong Wang e17618c00c x86: ia32: linker: move bss/noinit sections after data section
With this change, bss/noinit sections are excluded from generated
kernel binary. Smaller image size saves storage space and reduces
loading time.

Signed-off-by: Dong Wang <dong.d.wang@intel.com>
2024-05-23 07:49:06 -04:00
Flavio Ceolin b8d40c790d headers: arch/x86: Drop extern attr from functions
Drop extern attribute from function signature.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-05-20 20:49:25 -04:00
frei tycho 18fd294b5c include: arch: x86: added missing parenthesis
- added missing parenthesis around macro argument expansion

Signed-off-by: frei tycho <tfrei@baumer.com>
2024-05-17 14:39:21 -05:00
Daniel Leung 027a1c30cd x86: add support for memory mapped stack for threads
This adds the necessary bits to enable memory mapping thread
stacks on both x86 and x86_64. Note that currently these do
not support multi level mappings (e.g. demand paging and
running in virtual address space: qemu_x86/atom/virt board)
as the mapped stacks require actual physical addresses.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-04-10 07:44:27 -04:00
Daniel Leung ac5835565b x86: synchronize usage of CONFIG_X86_STACK_PROTECTION
Most places use CONFIG_X86_STACK_PROTECTION, but there are some
places using CONFIG_HW_STACK_PROTECTION. So synchronize all
to use CONFIG_X86_STACK_PROTECTION instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-04-10 07:44:27 -04:00
Daniel Leung 9f4330f365 x86: use CONFIG_PRIVILEGED_STACK_SIZE for stack size
Instead of using CONFIG_MMU_PAGE_SIZE for size of the privileged
stack, use the actual kconfig CONFIG_PRIVILEGED_STACK_SIZE.
This allows for changing the size of privileged stack, and
also aligns to the usage of CONFIG_PRIVILEGED_STACK_SIZE.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-03-08 09:37:36 +01:00
Najumon B.A dd9e0df06b arch: x86: add interface for encode irq flags
add interface for encode irq flags from acpica to arch specfic.
Currently enabled only for x86 archiecture.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-01-31 15:03:06 +01:00
Najumon B.A b5a9e8b031 arch: x86: add a sperate timer interface for acpica lib
add a separate timer interface for acpica lib instead of using
system timer which might use driver interface such as HPET and this
might cause init priority issue if a driver which need to init
before system timer driver instantiate.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-01-31 15:03:06 +01:00
Jamie McCrae 2522a78566 linker: Add flash end ROM offset
Reduces the size of an image in the linker script by using the
ROM end offset Kconfig value

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-12-12 15:31:16 +01:00
Daniel Leung 51b3420b80 doc: doxygen: move float_apis group into correct place
The float_apis group is incorrectly placed in x86/32 header.
This should be in kernel.h enclosing k_float_* functions.
So move it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-12-11 10:10:30 +01:00
Daniel Leung c972ef1a0f kernel: mm: move kernel mm functions under kernel includes
This moves the k_* memory management functions from sys/ into
kernel/ includes, as there are kernel public APIs. The z_*
functions are further separated into the kernel internal
header directory.

Also made a quick change to doxygen to group sys_mem_* into
the OS Memory Management group so they will appear in doc.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-11-20 09:19:14 +01:00
Najumon B.A a68204d8b8 arch: x86: update with new acpica lib interface
The old acpi implimentation is replaced with acpica interface
and updated x86 arch porting with the new interface.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-09-07 09:42:38 +02:00
Leifu Zhao 25b9f6b5bf x86: linker: move gdt reserve to outer ifdef
The original CONFIG_GDT_RESERVED_NUM_ENTRIES resides in the false
branch of ifdef LINKER_ZEPHYR_FINAL and is actually elminated
finally. It should reside in the outer ifdef clause, namely the
under ifdef CONFIG_GDT_DYNAMIC.

Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
2023-08-28 10:13:41 +02:00
Leifu Zhao 45a4177704 x86: linker: add linker script for ish aon section
link aon code into special aon memory region by put aon object files
into aon section.

Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
2023-08-18 12:24:31 +01:00
Maureen Helm 202a8ae5ca arch: x86: Enable devicetree linker memory regions
A devicetree compatible "zephyr,memory-region" was introduced in commit
18ffcdcf74 to generate linker script
memory regions from devicetree. It was enabled on arm and riscv
architectures only; extend that support to x86.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2023-08-18 12:24:31 +01:00
Najumon Ba b3d78de656 arch: x86: updated acpi config macro
renamed x86 CONFIG_ACPI config macro to CONFIG_x86_ACPI.

Signed-off-by: Najumon Ba <najumon.ba@intel.com>
2023-06-30 17:53:01 +03:00
Keith Packard 710422ec5e include/zephyr: Fix linker scripts to define _end after all static RAM data
The Zephyr linker scripts have inconsistent ordering of various chunks of
data which lands in RAM at runtime. This leads to the value of _end not
being consistently defined as the maximum address of static variables used
in the application.

Create a helper linker fragment, zephyr/linker/ram-end.ld, which can be
included after the last possible definition of RAM data, that consistently
sets _image_ram_end, _end and z_mapped_end.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-06-28 08:41:02 +00:00
Gerard Marull-Paretas dacb3dbfeb iterable_sections: move to specific header
Until now iterable sections APIs have been part of the toolchain
(common) headers. They are not strictly related to a toolchain, they
just rely on linker providing support for sections. Most files relied on
indirect includes to access the API, now, it is included as needed.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-22 10:42:30 +02:00
Qipeng Zha 3c2d768f8b arch: x86: assign unique name for TSS ISR stub
To avoid name conflict when register multi TSS IDT,
now only double fault use task gate, and Intel ISH
need to use additional TSS IDT for page fault.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
2023-05-09 13:03:49 +02:00
Kumar Gala 7469ad426a drivers: pcie: Use TYPE_SECTION macros for irq_alloc
Clean up irq_alloc to utilize TYPE_SECTION macros for handling sections.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-04-19 17:14:46 +02:00
Leifu Zhao 1cb259a43b arch/x86/ia32: Add option to reserve GDT entries
Some functions such as the ISH power management function needs to
reserve GDT entry place holders which are filled during runtime.
Add config option to define the number of GDT entry place holders
reserved and change the ia32 linker script accordingly.

Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
2023-04-13 05:43:20 -04:00
Stephanos Ioannidis 404e7a9bf7 treewide: Use CONFIG_CPP_EXCEPTIONS instead of CONFIG_EXCEPTIONS
This commit updates all in-tree code to use `CONFIG_CPP_EXCEPTIONS`
instead of `CONFIG_EXCEPTIONS`, which is now deprecated.

Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
2023-01-13 17:42:55 -05:00
Kumar Gala 77dcf91f50 smp: define arch_num_cpus always
Move arch_num_cpus outside of CONFIG_SMP in sys/arch_interface.h and
add define arch_num_cpus on all platforms (added arch_inlines.h on
those platforms that didn't have it before).

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-21 13:14:58 +02:00
Keith Packard 385ddecc54 arch/x86/ia32: Include TLS GDT entry in count
When generating zephyr_pre1.elf, the number of GDT entries must be known so
that the memory layout of the executable is correct. This count didn't
include an entry for the thread local storage GDT entry when necessary,
making all addresses in _pre1 off by 8 bytes compared with the final elf
file.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-10-20 09:59:33 +02:00
Kumar Gala 2530ba5750 arch: smp: Allow for number of cpus to be determined at runtime
Introduce a Kconfig (MP_MAX_NUM_CPUS) and an api arch_num_cpus() to
allow for systems that might determine the number of CPUs available to
Zephyr at runtime.

CONFIG_MP_MAX_NUM_CPUS is intented to be use for any array initialization
and such that need to occur at build time.  For most systems
arch_num_cpus() will just report the value of CONFIG_MP_MAX_NUM_CPUS.

The intent is to phase out CONFIG_NP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-13 16:02:19 +09:00
Gerard Marull-Paretas 11860face3 drivers: display: framebuffer: rework to make it self-contained
The "framebuf" driver was an incomplete driver expecting _clients_ to
implement missing functionality (i.e. init and device definition)
outside of the driver. This pattern of scattering driver code throughout
the tree is not common (if used at all). If certain drivers share
functionality, one can create a common module within the subsystem (see
e.g. ILI9XXX drivers).

The _generic_ framebuffer code was only used to implement the Intel
Multiboot framebuffer driver. This patch centralizes all the scattered
code in the subsystem and adjusts the driver name to "intel_multibootfb"
to make things clear. If there's ever another framebuffer driver that
shares code, it can be split into multiple modules.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-02 14:16:08 +02:00
Gerard Marull-Paretas dfb8e8c49e include: arch: x86: multiboot: add missing include
The header makes use of fixed integer typed, but did not include
stdint.h

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-02 14:16:08 +02:00
Anas Nashif 8fd777552e arch: add arch_proc_id() to get processor ID
Add a new interfaces for getting processor ID. On some of the
architectures, implement by means of arch_curr_cpu().

On xtensa, we get this via the PRID register.

Doxygen string by Andy Ross.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-06-21 10:48:28 +02:00
Abramo Bagnara ada9ca4c93 coding guidelines: comply with MISRA C:2012 Rule 7.2
MISRA C:2012 Rule 7.2 (A `u' or `U' suffix shall be applied to all
integer constants that are represented in an unsigned type)

Added missing `U' suffixes in constants that are involved in the
analyzed build, plus a few more not to introduce inconsistencies
with respect to nearby constants that are either unused in the
build (but implicitly unsigned) or are used and are immediately
converted to unsigned.

Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
2022-06-14 13:36:14 -04:00
Chen Peng1 d8fa857b19 LLVM: add built-in lld linker support for x86.
add support to use LLVM built-in lld linker to build
zephyr applications for x86 platforms.

Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
2022-06-05 14:10:25 +02:00
Gerard Marull-Paretas d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas fb9b3bcd93 include: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all includes within
include directory to the new prefix <zephyr/...>. Note that the
conversion has been scripted, refer to zephyrproject-rtos#45388 for more
details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:03:00 +02:00
Andy Ross e931b7ba47 arch/x86: Use EFI console as default printk handler
Where we have access to a bootstrap UEFI environment, it's productive
to use that console as the default printk handler.  That avoids the
bringup hassle of trying to configure UART settings blindly, as has
been customary.  It also emits nice text to the framebuffer on devices
with no serial port or other debug harness at all.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2022-05-04 11:34:55 +03:00
Yuval Peress 3b5c61d618 include: Update references for devicetree.h
Use zephyr/ prefix for devicetree.h includes.

Issue #41543

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-21 07:40:54 -05:00
Yuval Peress 53ef68d459 include: Prefix includes to use a scope
Move include paths and add new target_include_directories to support
backwards compatibility:
* /include -> /include/zephyr
  example: <irq.h> -> <zephyr/irq.h>

Issue #41543

Signed-off-by: Yuval Peress <peress@google.com>
2022-04-08 19:03:32 +02:00