Add DT binding for stm32 PWR peripheral that controlls wake-up pins.
This binding primarily introduces wake-up pins configuration in
a unifed way that takes into consideration the variations between
STM32 SoC series & facilitates the association of GPIO pins with
their corresponding wake-up pins.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Deprecate the CAN controller bus-speed/bus-speed-data properties and rename
them to bitrate/bitrate-data to match the terminology used in other CAN
devicetree properties and the CAN subsystem API.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Make it possible to disble device power management individually per
power state. This allows targets tuning which states should
(and which should not) trigger device power management.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
I chose this approach instead of software rotation because I need it for
an ultra low power project.
Rotation in steps of 0, 90, 180, 270 degrees is done by changing
the data entry modes.
This commit removes the orientation-flipped property as it is redundant.
I made the assumption that the current driver implementation is right
about controller X/Y versus display width/height. The display controller X
parameter matches with the display height (dts) and display controller Y
parameter matches with the display width (dts). It looks like display
manufacturers choose to have it like this because a wider screen probably
makes more sense.
Tested on the reel_board with a 250x122 display (ssd1673 controller)
and a custom PCB with a 200x200 display (ssd1681 controller).
Also tested all orientations with various width/height dts overrides.
Signed-off-by: Sven Depoorter <svndepoorter@gmail.com>
This add basic support for the STM32 Digital Temperature Sensor found
notably on the STM32H7 series. It work in interrupt mode and support
basic power device management.
It does not support the more advanced features like using the
temperature threshold, triggers from LPTIM or using the LSE clock in
during sleep or stop.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Improve the binding descriptions for the atmel,at24 and atmel,at25 EEPROM
compatibles. These compatibles work for a number of different EEPROM
families manufactured by vendors other than Atmel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix a compilation error occurring when a prescaler was set for ADC on F1
and F3 family.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support for the IS31FL3194 3-channel LED driver. This driver can be
configured to handle its outputs as either a single RGB LED or (up to)
three independent LEDs.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
The native Linux CAN driver supports CAN FD. Change the binding to reflect
this. No functional changes.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The CAN loopback driver supports CAN FD. Change the binding to reflect
this. No functional changes.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a soc/board integration for the MediaTek Audio DSP device on
the MT8195 SOC, along with a Zephyr mtk_adsp soc integration that will
work to support similar 8186 and 8188 device shortly.
A python loader (similar to cavsload.py) is included that will run in
developer mode on current chromebooks (an HP x360 13b-ca000 was
tested) with an unmodified kernel.
Signed-off-by: Andy Ross <andyross@google.com>
Add an interrupt controller driver for this device. This is an
extremely simple second level controller with per-interrupt-bit
registers for "enable" and "status". There is no internal latching,
so no "clear/ACK" process is needed.
Signed-off-by: Andy Ross <andyross@google.com>
Refactored vendor-specific duplicates of uart tx/rx invert properties
into a common dts file uart-controller-pin-inversion.yaml
Signed-off-by: Anuj Pathak <anuj@croxel.com>
This WDT is responsible for monitoring the external
32.728 Hz crystal connected to pins XTAL_32K_P and
XTAL_32K_N. If an oscillation failure is detected
the hardware automatically switch to RTC_RC_SLOW
clock source and triggers an interrupt.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add a parameter to allow the configuration of the number of address
bytes used by the I2C master. This allows the driver to expose larger
buffer sizes.
Tested with standard linux at24 driver.
Signed-off-by: Bram Vlerick <bram.vlerick@openpixelsystems.org>
Behavior of "force"-mode as described in datasheet cannot be achieved if
low-power mode is enabled. After triggering a sampling, the sensor will
not sample again for the period specified in measurement-time.
Signed-off-by: Juliane Schulze <juliane.schulze@deveritec.com>
Driver did not work on ESP32c3, by specifying pin to be output and
input solve the issue. Improve documentation, to highlight that driver
is requiring open-drain support.
Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
Rename nxp,kinetis-lptmr compat to nxp,lptmr.
Because of concerns over breaking downstream users,
keep support for the old compatible temporarily and
make it clear it should be changed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Some Ambiq Apollox Blue SOC (e.g. Apollo3 Blue) uses internal designed
BLEIF module which is different from the general IOM module for SPI
transceiver. The called HAL API will also be independent. This driver is
implemented for the BLEIF module usage scenarios.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.
This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.
It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The MBOX driver interface expects a device tree property '#mbox-cells'
which is not known by the IPM driver. This causes build problems when
both drivers are given for a single shared DT node.
To fix this problem for this driver specifically, add a dummy
'#mbox-cells' property to the bindings of the STM32 HSEM IPM driver.
This does not affect any other IPM driver, and the STM32 HSEM IPM driver
is still functioning with this dummy property.
Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
Add a device tree binding for the new driver. Since there already
exists an IPM driver using the unsharable hardware semaphore interrupt,
the new driver is not added to any boards or SOCs per default to avoid
compatibility problems. See #37300 for the IPM driver.
Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
Add support for the memory controller by utilizing QSPIC2. The latter is
capable to drive both NOR and PSRAM memory devices. For this to work,
the RAM driving mode is enabled.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Add bindings for NXP MIPI CSI-2 Rx which is a MIPI CSI-2 receiver
connecting a camera sensor to the NXP CSI.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
TLC59731 is a 3-Channel, 8-Bit, PWM LED Driver with
TI Single-Wire interface (EasySet) protocol.
Signed-off-by: Javad Rahimipetroudi <javad.rahimipetroudi@mind.be>
Convert the ST7735R display to use the MIPI DBI API. Boards and overlays
using this display are also updated.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Include reset device binding in some of the NXP LPC
IP bindings to be able to add the resets property.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add binding representing the peripheral reset controller
of the NXP LPC SYSCON heritage hardware including SYSCON
itself and the newer RSTCTL.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Clarify that there needs to be a cell named "id" in order
to be usable by the reset controller macros.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Previous value just activated the ability to trigger for both edges,
without (de)-activating the gpio. This caused an assrtion error in GPIO.h.
Fixes#71227
Signed-off-by: Juliane Schulze <juliane.schulze@deveritec.com>
Although we can get the number of configured OUT and IN endpoints and
endpoint capabilities from the DWC GHWCFGn registers, we need to
configure the number of endpoint configuration structs at build time. On
some platforms, we cannot access the hardware register at pre-init, so
we use the GHWCFGn values from the devicetree to provide endpoint
capabilities. This can be considered a workaround, and we may change the
upper layer internals to avoid it in the future.
Also, add a new vendor quirk to fill in platform-specific controller
capabilities.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add driver for TSic 206/306/316/506F/516/716 temperature sensor.
The driver uses PWM capture driver to read a single wire with
Manchester-like encoding.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Move it to a common file named `zephyr,memory-common.yaml`, which
replaces `zephyr,memory-attr.yaml` and takes its contents as well.
This is so that another binding, e.g., `vnd,memory-region`, can support
being combined with the `zephyr,memory-region` binding like so:
node@deadbeef {
compatible = "vnd,memory-region", "zephyr,memory-region";
zephyr,memory-region = "NAME";
...
};
To allow this, edtlib would require `vnd,memory-region` to include the
property definitions from this new common file.
The same can't be done by including `zephyr,memory-region.yaml` directly
because that file marks the property in question as always required, and
it shouldn't be required whenever the `vnd,memory-region` compatible is
used on its own.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
The gpio-emul driver does not actually require any reg property,
since it is not in the physical memory map of any device. So
let's remove that property from the bindings.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Remove all CAN controller "bus-speed" and "bus-speed-data"
properties. These all use the default bitrates set via Kconfig.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the default initial bitrates globally via Kconfig. The initial bitrates
can still be overridden using the "bus-speed" and "bus-speed-data"
devicetree properties.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove nxp_ground_select property.
Delete the use of NXP vref peripheral CSR register REFL_GRL_SEL bit.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
PHYTEC has multiple offices in different locations like
the US, France, India and China. The headquarter is located in
Germany. Since now 50% of the PHYTEC boards are from the US
office, we should drop 'Messtechnik GmbH', which is the offical
title of the German office, and keep the name more general.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add driver, together with the corresponding dts binding and node in
the nRF54H20 SoC definiton, for the nRF temperature sensor that cannot
be accessed directly but only through nRF Services (nrfs) layer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit makes the devicetrees of the targets that are based on the QEMU
`virt` machine more consistent with the rest of the RISC-V targets in
Zephyr by:
* adding the `riscv,isa` property
* adding a compatible string which uniquely identifies the `virt` core
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Add initial HID device support. Unlike the existing HID implementation,
the new implementation uses a devicetree to instantiate a HID device.
To the user, the HID device appears as a normal Zephyr RTOS device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The clk, dqs and ncs pins can be remapped between OSPI instances, but the
driver doesn't support it, yet. Therefore replace hard coded numbers to
device tree optional properties.
Signed-off-by: Samuel Kleiser <s.kleiser@vega.com>
Allow configuration of the system pll on the iMXRT10xx series parts, via
a fractional pll node under the CCM module.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adding required flag to the current-speed as without this driver
does not compile.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Gives number of the Extended Interrupts and Event Controller (EXTI)
interrupt line connected to the RTC Alarm event.
Used on all series, except WBAX & U5X, where RTC Alarm interrupt is
routed directly to Nested Vectored Interrupt Controller (NVIC) and to
Power Control (PWR) wake-up pins.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
This change allows to use DTR line driven from external serial port
that when active (low) will prevent UART device from going to sleep.
It will also wake up platform when DTR line becomes active.
DTR line is often activated in serial port connected to host computer
when operating system opens serial device like COMx for Windows
or /dev/ttyACMx /dev/ttyUSBx for Linux based systems.
DTR line (specified in device tree) will be used by WAKEUP and PDC
controllers (via GPIO driver) to handle DTR line changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This change allows to wake up UART from sleep mode when
low level on inactive UART is detected during platform sleep.
Timeout can be specified for each UART separately in device tree.
If one of the UARTs is selected as console sleep timeout is taken
from Kconfig same way other platform configure same functionality
using CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
If no HSFLL needs trimming, then `trim_hsfll()` should be compiled out.
This makes it easier to reuse the rest of `soc.c` out of tree.
Furthermore, some HSFLL instances can be trimmed before booting Zephyr,
so the FICR client properties in the DT binding should not be required.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
The emulated GNSS driver behaves like a GNSS, implementing
device pm and the GNSS APIs, using only kernel features (
zephyr work queue and uptime) making it buildable on all
zephyr targets.
The purpose of this device driver is to tailor and validate
the gnss api test suite.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The counter driver needs to know what is the maximum
counting frequency of each timer peripheral.
Let's add it to its DT.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add binding for adi SDP-120 connector and header file
with marcos to map signals using signal names.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Add driver for IS66WVQ8M4 PSRAM, using the MCUX FlexSPI interface to
write data to the PSRAM device.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some instances of the FlexSPI IP support a different clock source being
used for port B of the FlexSPI instance. Add a devicetree property and
driver support to enable configuring this property of the hardware.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added EXMIF peripheral DTS description and bindings.
The peripheral operates as an SPI device.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Add support for similar adin1100 phy, boath are 10Base-T1L,
only difference is that adin1100 connects through r/mii.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
MDIO is part of the ETH IP, but some phy chip may need a
specific phy driver to set up certain vendor registers enabling
particular features.
Add support for stm32 mdio access.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Add Sequans GM02S modem binding using the sqn vendor prefix.
The modem has an active low reset signal.
Signed-off-by: Thibo Verheyde <thibo@dptechnics.com>
Intial driver adding intial script to receive only GGA, RMC and GSV
NMEA messages, configuring fix rate, setting enabled system and adding
power management with the module on-off pin.
Signed-off-by: Jeronimo Agullo <jeronimoagullo97@gmail.com>
Spell checking tools do not recognize "iff", replace with "if and only if".
See https://en.wikipedia.org/wiki/If_and_only_if
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Convert the ht16k33 to use the input subsystem. This can still be used
with the kscan API with the zephyr,kscan-input driver, or use the
input-keymap one to generate input codes instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add basic functionality of Renesas SD/MMC driver. It can be used
for both gen3 and gen4 R-car boards, but tested only with H3ULCB,
Salvator XS M3 and Spider boards. This driver working with SDHC
subsystem.
The driver supports regularal reading/writing throught SD/MMC
controller buffer, DMA mode w/o interrupts and timing tuning.
Add gpio5 and sd0 nodes to h3ulcb and salvator xs which are needed
for working with SD cards. The GPIO node is needed for switching
voltage on SD card through gpio regulator driver.
Notes:
* the driver doesn't support SPI mode;
* SCC tuning and DMA mode based on IRQs are enabled by default;
* an address of a data buffer has to be aligned to 128 bytes if it
is not, driver will use non-DMA mode automatically;
* Renesas MMC DMAC doesn't support 64-bit DMA addresses, so for
case when we have 64-bit xref data address we use non-DMA mode;
* SD/MMC controller supports block size between 512 and 1 with
a lot of restrictions, more details you can find in code;
* support of HS400 mode isn't implemented inside driver.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add device driver for TI TMP114 I2C temperature sensor.
The driver only support basic functionality, i.e. fetch temperature
using default values.
Datasheet:
https://www.ti.com/lit/ds/symlink/tmp114.pdf
Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
For historical reasons, inversion mode is enabled by default in the
current implementation. This commit introduces an `inversion-off`
boolean DTS property, allowing it to be disabled if necessary.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Adds support for the PGOOD pin. This pin is asserted by the
regulator when converter startup has completed and the output
is stable. If the PGOOD pin is not used, the PGOOD state is
check via the PGOOD_PIN_STS bit.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Deprecate the use of location_* properties in the i2c_gecko driver
and migrate to the pinctrl api for enhanced maintainability and
compliance with current standards.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
This property will allow PWM driver allocate data buffer
in appropriate memory region.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Driver already handles the case when 'reset-gpios' is not provided, so
remove 'required: true' from bindings to allow boards / shields definition
without reset signal being connected to any Zephyr controlled GPIO.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the management
of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
The commit restricts erase-value to either 0xff or 0x00.
On program-erase type devices writes can only change from
erase value of bit to opposite, ease usually consists of two
operations which is programming the opposite value to every bit
of erase range and then turning back all bits to the "erase-value";
above makes it impossible to have erase value of device to be other
than 0xff or 0x00.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This implements basic driver to utilize the I3C IP block
on NPCX.
1. I3C mode: Main controller mode only.
2. Transfer: Support SDR only.
3. IBI: Support Hot-Join, IBI(MDB).
Controller request is not supported.
4. Support 3 I3C modules:
I3C1(3.3V), I3C2(1.8V, espi mode), (I3C3 1.8V or 3.3V)
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
add gpio_intel driver with acpi based resource enumeration support.
Also updated test cases overlay with new dts entires.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
FTM internal counter can be clocked by one of three clock sources
independent of the module bus clock. This patch introduces a DT property
to perform the clock selection from DT.
DT sources are updated to keep the current clock selection for all boards,
with exception of ucans32k1sic board which is migrated to use system
clock by default, as this seems to be a better choice for most cases.
Some PWM LED samples require slower clock so overlays are added for
those cases.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add support for half-duplex (3-wire) SPI operation using the Raspberry
Pi Pico PIO. To allow control of the size of the driver, including
half-duplex support is optional, under the control of Kconfig options.
The original PIO source code is also included as a reference.
Corrected 3-wire tx/rx counts.
Enable half-duplex code based on DTS configuration
Replace runtime checks with static BUILD_ASSERT()
Remove too-fussy Kconfig options
Removed PIO source per review request
Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
The MAC address macros are ridiculous in this driver.
Rewrite to be simpler and use eth.h common function.
Also, clarify the mac address generation on the DT overlays.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Adds a DAC driver for Texas Instruments DACx0501 family of devices
Signed-off-by: Eran Gal <erang@google.com>
Co-authored-by: Martin Jäger <17674105+martinjaeger@users.noreply.github.com>
Enable MIPI mode to be set via devicetree, for displays that support
multiple MIPI DBI modes. This commit also adds new helpers for displays
that allow drivers to initialize the entire MIPI DBI configuration
structure from devicetree
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Nuvoton NPCX chips have reset registers which allow to reset the
peripheral hardware modules. This commit adds the support by
implementing the reset driver. Note that only the reset_line_toggle API
is supported because of the nature of the reset controller's design.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Currently, all devices are initialized at boot time (following their
level and priority order). This patch introduces deferred
initialization: by setting the property `zephyr,deferred-init` on a
device on the devicetree, Zephyr will not initialized the device.
To initialize such devices, one has to call `device_init()`.
Deferred initialization is done by grouping all deferred devices on a
different ELF section. In this way, there's no need to consume more
memory to keep track of deferred devices. When `device_init()` is
called, Zephyr will scan the deferred devices section and call the
initialization function for the matching device. As this scanning is
done only during deferred device initialization, its cost should be
bearable.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
CSS was deprecated from the mcu-sdk. Removing driver from lpc55s36
to clear build error.
This is a temporary patch to remove the build error.
Fixes#69961
Signed-off-by: David Leach <david.leach@nxp.com>
Implement a sensor for the output diagnostics of the power train
switch TLE9104.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This commit enables pinctrl on i.MX8ULP. This includes:
1) Adding `pinctrl_soc.h` header file.
2) Adding DTS node for IOMUXC1, which is one of the
IPs responsible for managing the 8ULP pads.
3) Adding .dtsi with pin definitions. For now, only
the LPUART7 pads are added to this file because this
is going to be the only consummer for now.
4) Modifying the `pinctrl_imx.c` driver to work for 8ULP.
5) Enabling the `CONFIG_HAS_MCUX_IOMUXC`, which is a
dependency of `CONFIG_PINCTRL_IMX`.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add binding for sitronix ST7796s, a MIPI DBI display controller
supporting up to 320x480 displays at 18 BPP
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The SparkFun Pro Micro header pins are numbered D1, D0, GND, ... from top
left whereas the SparkFun Pro Micro RP2040 and the Adafruit KB2040 boards
are using gpio 0, 1, GND, ... , so the pro_micro: connector gpio-map of
these boards should reflect that.
Graphical Datasheet for SparkFun Pro Micro RP2040:
https://cdn.sparkfun.com/assets/e/2/7/6/b/ProMicroRP2040_Graphical_Datasheet.pdf
Graphical Datasheet for SparkFun Pro Micro:
https://cdn.sparkfun.com/assets/f/d/8/0/d/ProMicro16MHzv2.pdf
Pinout of the Adafruit KB2040:
https://learn.adafruit.com/assets/106984
Please note that the KB2040 uses CircuitPython pin labels D0, D1 which does
not seemt correspond to the Arduino labels D0 and D1 used by the Pro Micro.
Signed-off-by: Daniel Irekvist <ulmanyar@gmail.com>
Add devicetree binding for NXP LCDIC. This controller is capable of
driving displays in 8080 or SPI 3/4 wire mode, and optionally swapping
endianness of display data as it sends it.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The initial version of an input driver for Cirque Pinnacle ASIC supports:
* Setting sensitivity
* Choosing between relative and absolute modes
* Relative mode
* Primary tap
* Swapping X and Y
* Absolute mode
* Setting number of idle packets
* Clipping coordinates outside of active range
* Scaling coordinates
* Inverting X and Y coordinates
Signed-off-by: Ilia Kharin <akscram@gmail.com>
For now DSI settings are hard-coded for the specific
LCD module used on the STM32H747I Discovery board
Signed-off-by: Erik Andersson <erian747@gmail.com>
To support the NT35510 display, some additional
options needs to be configurable in the STM32
DSI peripheral
Signed-off-by: Erik Andersson <erian747@gmail.com>
