Commit graph

3638 commits

Author SHA1 Message Date
Michael Hope 3bf10e9bc6 drivers: i2c: add a driver for the CH32V00x series 2024-06-16 15:52:38 +02:00
Michael Hope 58a0876035 drivers/console: add a QingKeV2 Debug console driver 2024-06-16 15:52:38 +02:00
Michael Hope bf66dd1c8c drivers: add the ch32v00x USART driver 2024-06-16 15:52:36 +02:00
Michael Hope afc2f2bc79 drivers: add the ch32v00x PWM driver 2024-06-16 15:52:36 +02:00
Michael Hope 80b0190ee4 drivers: add a GPIO driver 2024-06-16 15:52:36 +02:00
Michael Hope 5c93af4642 drivers: add the PFIC interrupt controller 2024-06-16 15:52:36 +02:00
Michael Hope c829283092 drivers: add the ch32v00x systick driver 2024-06-16 15:52:36 +02:00
Michael Hope ea8edab111 drivers: add the ch32v00x clock controller 2024-06-16 15:52:36 +02:00
Michael Hope 27229b8247 drivers: add ch32v00x pinctrl support 2024-06-16 15:52:35 +02:00
Michael Hope c1b087e045 dts: add the ch32v003 DTSI and bindings 2024-06-16 15:52:35 +02:00
Robert Hancock 68a24863c0 drivers: spi_xlnx_axi_quadspi: Optimize FIFO handling
Add an optional DT property to specify the size of the RX/TX FIFO
implemented within the SPI core. The property name used is the same one
used by Xilinx's device tree generator.

When the FIFO is known to exist, we can use the RX FIFO occupancy register
to determine how many words can be read from the RX FIFO without checking
the RX FIFO empty flag after every read. Likewise with the TX FIFO, we can
use the FIFO size to avoid checking the FIFO full flag after every write.
This can increase overall throughput.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2024-06-15 05:15:46 -04:00
Robert Hancock cff3811613 drivers: spi_xlnx_axi_quadspi: add STARTUP block workaround support
Add support for a workaround required when using the Xilinx Quad SPI core
with the USE_STARTUP option, which routes the core's SPI clock to the
FPGA's dedicated CCLK pin rather than a normal I/O pin. This is typically
used when interfacing with the same SPI flash device used for FPGA
configuration. In this mode, the SPI core cannot actually take control
of the CCLK pin until a few clock cycles are issued, which would break
the first transfer issued by the core. This workaround applies a dummy
command to the connected device to ensure that the clock signal is in the
correct state for subsequent commands.

See Xilinx answer record at:
https://support.xilinx.com/s/article/52626?language=en_US

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2024-06-15 05:15:46 -04:00
Trent Piepho d7e03dd148 drivers/sensor: si7006: Support SHT21 and HTU21D
These three sensor types are all largely compatible.  The SHT21 and
HTU21D can be supported by this driver by sending command 0xE3 instead
of 0xE0 to read the temperature.

Mention the sensor names in bindings and Kconfig to help those looking
for support to find it.  There have been at least five PRs attempting to
add SHT21 and/or HTU21D support that did not realize the Si7006 is the
same.

As mentioned in PR #22862, the Sensirion SH21 is the original.  The dts
bindings are adjusted (in a backward compatible way!) to make the sht21
the base binding and si7006 is derived from that.

Examples of dts compatibles:

TE Connectivity née Measurement Sepcialties HTU21D:
compatible = "meas,htu21d", "sensirion,sht21";

Sensirion SHT21:
compatible = "sensirion,sht21";

Silicon Labs Si7006
compatible = "silabs,si7006";

Silicon Labs Si7021
compatible = "silabs,si7021", "silabs,si7006";

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
2024-06-15 04:42:31 -04:00
Jakub Zymelka 8091e93838 drivers: mbox: nrf: Change VEVIFs and BELLBOARD nomenclature
Renaming 'LOCAL' to 'RX' and 'REMOTE' to 'TX'.
This seems more descriptive and intuitive to use.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-06-15 04:41:47 -04:00
Jakub Zymelka bace4a102d drivers: mbox: add initial driver for nRF VEVIF event
Add a mailbox driver for VEVIF events (VPR irq).
The driver can be built in either 'rx' or 'tx' configuration.
The VPR sends the event, so it uses the 'tx' configuration,
while the master core uses the 'rx' configuration of the driver
to receive the VPR events.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-06-15 04:41:47 -04:00
Swift Tian ece0c9b0d3 drivers: mspi: Add ATXP032 NOR flash driver
The ATXP032 is a NOR flash device that supports up to ~100MHz
octal SDR/DDR with 4MB nonvolatile memory.
The device driver uses MSPI bus API and could be used across different
SoC controllers that implement the MSPI bus API.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Swift Tian c7ed0b6aa8 drivers: memc: Add APS6404L device driver
The APS6404L psram is a quad SDR SPI device that runs up to 100MHz.
It can provide 8MB of external RAM for SoCs that supports XIP feature.
The device driver uses MSPI bus API and could be used across
different controllers that implement the MSPI bus API.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Swift Tian aa66570c9e dts: mspi: Add Ambiq MSPI DTS and bindings
Add the Ambiq MSPI nodes to soc device tree and base bindings for
MSPI controllers and devices.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Swift Tian 0e1f88dd0e dts: mtd: Add MSPI flash emulator binding
Add the binding the flash emulator under MSPI bus.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Swift Tian 11c1722fef dts: mspi: Add MSPI emulator bindings
Add the controller and device emulator bindings for MSPI.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Swift Tian 8dd5b1e6b8 dts: mspi: Add MSPI bindings
Add the generic controller and device bindings for MSPI.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
Jan Kowalewski e2c9efc4c9 dts: bindings: vendor-prefixes: add CTHINGS.CO
Add CTHINGS.CO to vendor prefixes

Signed-off-by: Jan Kowalewski <jkowalewski@cthings.co>
2024-06-14 18:50:14 -04:00
Benjamin Lemouzy 5c8937fbac drivers: sensor: lm75: add alert threshold support
Add SENSOR_ATTR_ALERT and SENSOR_ATTR_HYSTERESIS attributes support.
The code is heavily inspired by the one for lm77 sensor.

Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
2024-06-14 18:48:32 -04:00
David Ullmann 421e598825 dts: lora: add board support for reyax lora module
adding board support for reyax module as a shield on psoc62s4 board

Signed-off-by: David Ullmann <davidl.ullmann@gmail.com>
2024-06-14 17:12:49 -04:00
David Ullmann 3db614fe3b dts: bindings: Add reyax
adding vendor prefix to prepare for adding lora module

Signed-off-by: David Ullmann <davidl.ullmann@gmail.com>
2024-06-14 17:12:49 -04:00
Daniel DeGrasse be23e70fff drivers: display: gc9x01: convert to MIPI DBI API
Convert galaxycore GC9X01 to MIPI DBI API. In tree boards and tests
using this display have also had their devicetrees updated to use the
new MIPI DBI SPI emulated device.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-14 17:11:20 -04:00
Dong Wang 9faf111744 dts: bindings: dma: correct compatible name of Intel SEDI dma controller
Replace an underscore with a hyphen in the name to align with the general
naming convention.

Signed-off-by: Dong Wang <dong.d.wang@intel.com>
2024-06-14 20:33:05 +02:00
Robert Hancock 2d171efcec drivers: sensors: Add driver for LM95234 temperature sensor
Add a driver for the National/TI LM95234 Quad Remote Diode and Local
Temperature Sensor with SMBus Interface and TruTherm Technology.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2024-06-14 19:34:01 +02:00
Daniel DeGrasse 9fdaf43e79 drivers: display: uc81xx: convert to MIPI DBI API
Convert UC81XX display to use MIPI DBI API, as this display uses a SPI
3/4 wire bus. In tree shields using this driver have also had their
devicetrees updated to use the new MIPI DBI SPI driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-14 19:32:39 +02:00
Jiafei Pan 4f034f46b0 soc: imx8mp: enable rdc for enet
Add RDC dts node for ENET and configure it in soc.c.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-06-14 19:21:18 +02:00
Guillaume Gautier 3e99dc26f6 dts: bindings: flash_controller: add ncs line property to stm32 xspi flash
Add a property to define the nCS line used by the XSPI driver for the
external Flash.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-06-14 15:44:38 +02:00
Maximilian Deubel 3ef2c66a8a driver: swdp_bitbang: rework pin configurations
Move low-level GPIO functions to a separate file and use GPIO driver
API if low-level GPIO support is not available for the platform.
Allows alternative pin configuration using only two pins, clk and dio.
Improve binding description.

Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-06-14 11:14:17 +02:00
Johann Fischer 7c9259abbc dap: add CMSIS-DAP compatible controller
Add CMSIS-DAP compatible controller which is a handler between
the host interface and SWD driver. The controller follows CMSIS-DAP
reference implementation. It expects a request buffer from the host
interface, splits it to simple transfers and forwards to the DP driver,
and finally returns a response buffer to the host.
Interface to the host can be implemented with USB HID device support.

Controller implements only SW-DP support and is tested
with pyOCD and ADIv5.x.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2024-06-14 11:14:17 +02:00
Johann Fischer 3cf630fb0b driver: add SWDP driver interface API and bit-bang driver
Add Serial Wire Debug Port interface driver API and bit-bang driver.

The driver requires a simple Hardware Interface Circuits (HICs),
where signals CLK, DOUT, DIN, ENn, OE_ENn, RESETn
are connected to board GPIOs and buffered signals SWD_CLK and SWD_DIO
to the target.

Signal OE_ENn controls the direction of the Serial Wire (SWD_DIO),
ENn the buffers SWD_CLK possibly others and enables/disables HIC.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2024-06-14 11:14:17 +02:00
Declan Snyder 801028b763 dts: nxp,lpc-gpio: Fix binding to group ports
LPC GPIO binding was wrong in that the reg address
on the simple soc bus was given as an index of the gpio ports
within a gpio controller. Fix this by putting the GPIO node
on the simple bus as a single node with the correct base address,
and make the ports children of this node.

Change the driver to get the port number from the reg address
instead of a custom property, and get base address from DT instead
of the SDK macro definition.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-06-14 11:13:05 +02:00
Prashanth S 59b2ef2739 drivers: timer: Add TI DM TIMER support
TI Dual-Mode timer is used as the arch timer for systick on J721E R5
cores. Add DM Timer for systick timer support.

Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
Signed-off-by: Andrew Davis <afd@ti.com>
2024-06-13 20:25:14 -04:00
Daniel DeGrasse 8d2dc2f9ef drivers: display: ssd16xx: convert to MIPI DBI API
Convert SSD16XX display driver to use MIPI DBI API. This commit also
updates in tree board devicetrees to include the emulated MIPI DBI SPI
driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-13 17:01:16 -04:00
Mahesh Mahadevan b219596cc1 drivers: mipi_dbi: Add controller driver for NXP FlexIO LCD
Add a driver to support the NXP FlexIO LCD controller that uses
8080/6800 bus protocol.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-06-13 16:48:34 -04:00
Mahesh Mahadevan 3dd5ffe20a drivers: display: st7796: Update the logic to invert RGB and BGR
1. Add a property for panels where the RGB is displayed as BGR.
2. Add a check for 8080 8-bit mode and invert RGB and BGR for
   this case.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-06-13 16:48:34 -04:00
Mahesh Mahadevan 53b5dbfb88 include: mipi_dbi: Add defines for MIPI Type A and B
Add defines for MIPI DBI Type A based on Motorola 6800
and Type B baedon Intel 8080 bus

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-06-13 16:48:34 -04:00
Mark Wang a4e411bd13 dts: arm: nxp: enable udc DT on lpc55s69, rt1060 and rt685
define usbphy in DT and controller DT node ref to usbphy node.
define the usbphy yaml and update ehci and ip3511 yaml for usbphy.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2024-06-13 17:59:31 +02:00
Jeronimo Agullo 436f56646b boards: sparkfun: Add micromod nrf52840 board and asset tracker shield
Initial support of Sparkfun Micromod ecosystem with micromod nrf52840
board, asset tracker shield and micromod header definition.

Signed-off-by: Jeronimo Agullo <jeronimoagullo97@gmail.com>
2024-06-13 17:55:42 +02:00
Fabio Baltieri 2c5b09cbda usb: device_next: rename the rate properties to use the correct unit
The polling properties are a period in us but are named as "-rate" right
now, which would imply that that's a frequency. Rename them to
"period-us" to make that unambiguous.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-06-13 08:03:49 -04:00
Nazar Palamar 17889d23b9 driver/bluetooth: Added initial version of hci cyw208xx driver
Added initial version of hci cyw208xx driver

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-06-13 05:52:19 -04:00
Lyle Zhu d164f9c0bb driver: bluetooth: hci: Add NXP BT module support
Implement UART firmware download driver for NXP
BT module.

Only support Murata 2EL M.2 module on RT1170EVKB.

And only one instance can be supported now.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2024-06-13 05:45:36 -04:00
Daniel DeGrasse a0e3dd1f87 drivers: display: st7789v: convert to MIPI DBI API
Convert ST7789V display driver to use MIPI DBI API. This commit also
updates in tree boards to use the new devicetree syntax needed to enable
this display with the MIPI DBI API.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-06-13 09:22:54 +02:00
Lothar Felten 7fef853015 boards: lilygo: ttgo_t8c3: initial support
adds initial support for Lilygo TTGO T8-C3 board

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
2024-06-12 21:15:09 -04:00
Joakim Andersson 04e56f72c7 drivers: flash: Fix stm32 ospi and xpsi reset gpios handling
Fix compilation error when reset-gpios is enabled.
Undefined reference to dev_cfg variable.
Reset gpio duration needs to be defined, but is not in binding file.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-06-12 12:51:06 -04:00
TOKITA Hiroshi fbe912395c dts: bindings: dma: raspberrypi: Correcting typo
A `GPIO` word is in the description section.
Correcting it to `DMA`.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-06-12 14:34:09 +03:00
TOKITA Hiroshi 8b49895de6 dts: bindings: dma: raspberrypi: Fix irq0-channels definition
`irq0-channels` defines even-numbered channels as the default value.
Since 6 was dropped from this definition, it is added.
Also, since the maximum number of channels is 12,
remove the ones that are exceeded.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-06-12 14:34:09 +03:00