On stm32f302/3 series, USB and CAN_1 share same IRQ lines.
To use USB and CAN_1 together, USB IRQ could be remap to other
line numbers, on which there is no conflict.
Remap the USB IRQ lines by default:
-Assign remap number in matching dtsi files
-Perform remap before usb driver init
Additionally, fix compilation issue in usb driver.
Fixes#22343
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
List the details for each type in the order they appear in the summary
of all types. Add the missing 'path' value to the summary.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace Kconfig configuration data with devicetree bindings using
(ADC) io channels. Rework the sample to document expectations about
the relationship between the reference voltage and the divider input
voltage, and update the sensor configuration to support Nordic SAADC.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Fix the following device tree warnings:
unit-address and first reg (0x20000) don't match for iccm@0
unit-address and first reg (0x80010000) don't match for dccm@80000000
Since the em_starterkit_em7d_normal has a different base address for
iccm & dccm, and most of the em_starterkit variants have different sizes
for iccm & dccm. Just define the nodes in the specific
em_starterkit*.dts file and remove them from emsk.dtsi. This removes
the issue reported in the warning.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since there are times that we include a base .dtsi file and change the
reg address we tend to end up with warnings that the reg address and
unit-address don't match. To handle this introduce a simple DT_ADDR(x)
macro that will prepend '0x' to a 'unit-address' style address.
#define DCCM_ADDR 80000000 /* in unit-address format */
dccm0: dccm@DCCM_ADDR {
reg = <DT_ADDR(DCCM_ADDR) 0x1>;
...
};
This allows the dts file to override the value of DCCM_ADDR and than to
have the unit-address of the node and the reg address match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Create an SoC definition for the Audio DSP on Intel Apollolake
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds a simple binding for the Cadence Tensilica Xtensa LX4
CPU. File originally from the LX6 binding.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Convert to support devicetree.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update to use new API for GPIO pin configuration and operation. Fix
invalid arithmetic on void pointer. Mark all CC2520 GPIOs as required
in binding.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update the lora/sx1276 driver to the new GPIO API, using configured
active level and the replacement interrupt and active-sensitive set
APIs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Document and assign write-protect signal as active low, and use the
active-sensitive API to control it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update devicetree sources and bindings, switch to new GPIO API. Use
devicetree property name to identify interrupt signal.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API. Update all
devicetree bindings to add INT signal active level. Document active
level.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update sample overlays. Add GPIO flags to configuration state.
Refactor to split out setup/handle/process phases. Switch to new API
replacing callback dis/enable with interrupt dis/enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The offset and the number of pins were swapped causing an error when a
64-position left shift was generated to calculate the pin mask.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since this was converted to the setup/handle/process idiom in master
the conversion is straightforward.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit updates the HMC5883L driver to use the new GPIO API.
Also add a note explicitly describing the active state of the DRDY
pin in the binding file.
Tested on frdm_k64f.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
Update sample overlay for missing chip select and to deconflict with
UART TXD. Add GPIO flags to configuration state. Replace callback
enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a sample overlay. Add GPIO flags to configuration state. Replace
callback enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Converts the fxas21002 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on the hexiwear_k64 board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This maps devicetree GPIO phandle arrays from the full controller pin
range to the sub-controllers required by Zephyr's limit of 32 pins per
controller device.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There were complains about the unit-address and first reg
not matching. So update the DTS file to match.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Converts the fxos8700 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on frdm_k64f and rv32m1_vega_ri5cy boards. The latter verifies
that the reset output works correctly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts the usdhc driver to the new gpio api. Updates the
device tree for the mimxrt1050_evk board to set appropriate active
high/low polarity for the power and card detect pins.
Note that the driver doesn't actually support interrupts yet. It
initializes a gpio callback for the card detect pin, but never actually
enables the gpio interrupt. This incomplete behavior is left as-is,
since the purpose of this patch is only to convert the driver to the new
gpio api, not to add new features.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commits adds GPIO driver for LiteX SoC builder.
Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
IO extenders may provide input signals to LEDs or sensors where
leaving the signal undriven may result in increased power consumption
or misbehavior. The SX1509B powers up with all signals configured as
inputs. Provide a way to indicate which pins should be set as output,
and their initial signal level, when the device is configured.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update ALERT active level in all devicetree files. Capture GPIO flags
in static configuration. Add internal API to enable and disable
interrupt, to release the handlers when an alert occurs, and to
re-enable the signal when the handler completes. Check for alerts
received during periods when the interrupt was disabled.
Extend the example to handle both above and below range triggers and
alerts that are present on startup.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert the GPIO based driver to the new GPIO API. (Only the
gpio_configure() call is affected).
Move configuration to DT where appropriate for both SPI and GPIO
drivers, only leaving the SPI vs. GPIO decision in Kconfig (in
addition to the basic enable for the driver.) Move some files around
to clean up as a result of this change.
led_ws2812 sample changes:
- make the pattern easier to look at by emitting less light
- use led_strip alias from DT to get strip device, allocate
appropriate struct led_rgb buffer, etc.
- move the pins around and remove 96b_carbon support (I have no board
to test with)
GPIO driver specific changes:
- str is required to write OUTSET/OUTCLR, not strb. The registers
are word-sized.
- the str[b] registers must all be in r0-r7, so "l" is the correct GCC
inline assembly constraint for both "base" and "pin"
SPI driver specific changes:
- match the GPIO driver in not supporting the update_channels API
method, which never made sense for this type of strip
- return -ENOMEM when the user tries to send more pixel data
than we have buffer space for instead of -EINVAL
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Mark the INT signal to be active low and use the new functions to get
gpio state and configure the gpio interrupt flanks.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Correct DRDY active level to default active-high, switch to new
interrupt configuration.
Also fix a common bug where an already-active DRDY signal is not
properly handled.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit adds the following:
- EFR32FG1P SoC support for the watchdog
- efr32_slwstk6061a board support for the watchdog
Signed-off-by: Oane Kingma <o.kingma@interay.com>
This commit adds the following:
- EFR32MG SoC support for the watchdog
- efr32mg_sltb004a board support for the watchdog
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Define a binding for a voltage divider circuit with one or more analog
input channels. Add devicetree nodes for several boards that have
battery voltage measurement support.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Adds device tree bindings for the focaltech ft5336 touch panel
controller, which will be used on several i.mx rt evk boards.
Moves address-cells and size-cells properties from the base kscan
bindings to the specific microchip,xec bindings since they are not
required for the ft5336.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The blocks were moved into the soc block in samd5x.dtsi,
so we also have to move them for the the actual SoC definitions
that inherit from that.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Extended nrf_uarte driver to support TX only UARTE instances.
When RX pin is not provided then RX is not started at all. This
allows to achieve low power with logging/console enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Most JEDEC NOR flash devices uses not only typical SPI mode
(MISO,MOSI,SCK and CS), but also QSPI mode (IO0,IO1,IO2,IO3,SCK and CS).
QSPI mode uses more data lines and as a result provide higher
throughput. If this were not enough, Nordic chips provide
hardware acceleration for read/write/erase functions, what
gives significant performance boost.
It does a lot of things "behind the scene", i.e when user has written
some data to the flash and would like to read them back, it has to wait
until the flash is ready by reading WIP bit in Status Register.
This driver does it automatically.
Signed-off-by: Kamil Lazowski <Kamil.Lazowski@nordicsemi.no>
Update the hal_nordic module revision, to switch to nrfx 2.1.0.
Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch introduces the periph to/from memory dma transfer
define new values for dma cells on client side
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This checks if the DMA controller supports or not
the memory-to-memory transfers. For DMA Version1,
in the stm32f2xx, stm32f4xx, stm32f7xx series,
only DMA instance 2 is able to transfer mem-to-mem.
For other series, with DMA Version2, there is no such a limitation.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Check with 'const:' that #address-cells is 1 and #size-cells is 0. That
way other values will get flagged by edtlib.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Not needed. Bindings are never concatenated together.
Makes the https://github.com/zephyrproject-rtos/ci-tools/pull/123 check
clean, though it only looks at changed files in PRs.
Clean up the header too.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Ethernet MAC present in Silicon Labs EFM32GG11B4xx and
EFM32GG11B8xx SoCs.
DMA based driver with support for link up/down detection.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
This commit adds initial support for the Silicon Labs EFM32
Giant Gecko GG11 StarterKit.
Features supported for now are NVIC, SysTick, GPIO, Flash,
Counter, I2C, UART and Ethernet. Support for Watchdog and
ADC will follow as soon as their respective PRs are merged.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Define a binding for the Bosch BMA280 sensor. Remove the Kconfig
settings and update the driver to use the devicetree information.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Merge all the information into 'description:' and remove 'title:'.
Gets rid of a deprecation warning.
See commit 2934ee2cda ("dts: bindings: Remove 'title:' and put all info.
into 'description:'").
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Currently, only the stm32h747 soc is supported in the h7 foler.
The h7 series comes with both single core and dual core products.
This change moves C-M4 core out of stm32h7.dtsi so that it can be
included by single core STM32H7 soc description.
Signed-off-by: Moonkwun Jung <mkainyh@gmail.com>
Fix the RTC device tree node for the NXP K6x SoC series. This device
is compatible with nxp,kinetis-rtc.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
STM32L073 soc variant is a STM32L072 with LCD peripheral.
Reflect this in dts definition by including stm32l072.dtsi
in stm32l073.dtsi.
This also allows to fix an issue on stm32l073 gpioe which
declared wrong reg definition.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The I2C controllers on the MEC1501 SoC can be attached to
different I2C output line. For example, the I2C #0 controller
can be used with I2C7 physical lines out of SoC. The output
selection is done by the attribute "port_sel". This renames
the parent I2C nodes on the SoC side to refer to
the controller themselves instead of the output lines to
avoid confusion. The labels of these nodes are also renamed
to reflect the controllers.
On the board level, the DTS labels are overwritten to indicate
the actual output lines.
Aliases are also provided in both SoC and board levels to
provide shortcuts to the DTS nodes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such. If anyone
is interesting in supporting this platform we can easily recovery it
from git.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree nodes for the internal temperature sensor in the NXP
Kinetis K6x SoC series.
A temperature sensor node is added for each ADC in the SoC to allow
the user to choose which ADC instance to use for the sensor readings.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add device tree nodes for the internal temperature sensor in the NXP
Kinetis KE1xF SoC series.
A temperature sensor node is added for each ADC in the SoC to allow
the user to choose which ADC instance to use for the sensor readings.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add device tree binding for the internal temperature sensor found on
the NXP Kinetis SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.
Signed-off-by: Roland Ma <rolandma@yahoo.com>
The amount of lock regions differs between different sam0 MCUs.
saml10: 2
saml11: 4
samd2x: 16
saml2x: 16
samd5x: 32
ASF does not provide a definition for this, so create a new one
in dts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This header is found on TI LaunchPad development kits and BoosterPack
expansion modules. This binding allows boards to define mappings from
header pins to device GPIOs.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all lpc socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx 6/7 socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx rt socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all kinetis socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add device_type DTS property in sram0 and sram1 nodes,
for nRF5340 Application and Network CPU, respectively.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds SPI driver and its bindings using the USART peripheral
for Silicon Labs EFM32 and EFR32 MCUs.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
EEPROM simulator and native_posix have been unified to one solution,
the old eeprom,native_posix is removed.
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Add support for a eeprom simulator. The PR limits the addition to
qemu_x86 but it can easily be added to other devices by defining the
eeprom simulator in the dts and setting 'CONFIG_EEPROM_SIMULATOR=y'
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).
The functionality is split into two drivers; an ADC driver and a GPIO
driver.
Tested with LMP90080 and LMP90100.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a binding for the sensor and replace all Kconfig selection of
hardware parameters with devicetree property values.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add binding support for a 'path' property type, for properties that are
assigned node paths. Usually, paths are assigned with path references
like 'foo = &label' (common in /chosen), but plain strings are accepted
as well as long as they're valid paths.
The 'path' type is mostly for completeness at this point, but might be
useful for https://github.com/zephyrproject-rtos/zephyr/issues/21623.
The support is there already in dtlib.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
PWM driver for LiteX SoC builder was created.
Because LiteX supports only one channel for each PWM device,
an appropriate restriction was made.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds I2C bitbang driver for LiteX SoC builder with its bindings.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add support for specifying PWM flags for the NXP Kinetis FlexTimer
(FTM) PWM driver through the device tree.
All in-tree clients of this PWM controller are active-low LEDs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit fixes the following problems with the RPU device tree:
1. The core type of the RPU of ZynqMP SoC is Cortex-R5F, not
Cortex-R4.
2. RPU and APU use different interrupt controllers (PL390 GICv1 and
GIC-400 GICv2, respectively) mapped to the same CPU local bus address
region but with different offsets for the distributor and CPU
interrupt control register sets. The GIC address mapping specified by
the current dts is that of an APU and does not apply to the PL390
GICv1 of an RPU (refer to the "Zynq UltraScale+ Devices Register
Reference" document from Xilinx for more information).
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
ZynqMP SoC embeds two separate processor types: Cortex-R for RPU and
Cortex-A for APU.
Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within one project, the RPU and APU should be considered
separate platforms.
This commit relocates the device tree nodes that are not common between
RPU and APU to a separate dtsi file (zynqmp_rpu.dtsi).
When Cortex-A53 APU support is added in the future, an additional dtsi
file (zynqmp_apu.dtsi) for specifying the APU device tree should be
added.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This enables LiteX PRBS random number generator driver
for litex_vexriscv board.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds PRBS ranom number generator driver for
LiteX SoC builder with its bindings.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Johann Fischer pointed out that the driver for this sensor
(master/drivers/sensor/tmp116/tmp116.c) doesn't use GPIOs, in
https://github.com/zephyrproject-rtos/zephyr/pull/21605, though there
seems to be an ALERT pin from looking at the datasheet
(http://www.ti.com/lit/ds/symlink/tmp116.pdf).
Remove the unused property declaration.
I was originally just going to change a 'category: optional' to
'required: false' (and 'type: compound' to 'type: phandle-array').
Either solution is fine with me. Could keep the declaration if people
are planning to use it soon.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
'category' is deprecated. See commit fcd665a26c ("dts: bindings: Have
'required: true/false' instead of 'category: ...'").
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patchset enables USART3 on the 96Boards STM32 Mezzanine.
It is broken out to J10 Grove Connector.
Changes:
- Enabled USART3 in board dts.
- Updated board index.rst with uart pinouts.
- soc dtsi: enabled usart3.
Test: Tested USART3 as console at 115200 baud
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Define a binding for the Aosong DHT family of temperature/humidity
sensors. Remove the Kconfig settings, and update the driver to use
devicetree information.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Currently most SPI NOR serial flash devices are accessed through the
spi-nor flash driver, but there are pending enhancements that will
access these devices through other driver implementations. Several of
the descriptive properties of the flash memories are common regardless
of the interface selected. Pull those out to a separate yaml file to
be included into the bindings for interface-specific node descriptions.
Also revise the documentation to note that the jedec,spi-nor
compatible depends on a commands set compatible with the Micron M25P80
serial nor flash; there is no JEDEC standard for these commands.
These devices do generally provide descriptive structures defined by
JESD216, but currently Zephyr doesn't make use of these structures.
The JEDEC CFI standard previously referenced in the description is not
relevant to these devices.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
I keep mixing these up, so that's probably a sign that the names are
bad. The root of the problem is that "parent-bus" can be read as both
"this is the parent bus" and as "the parent bus is this".
Use 'bus:' for the bus "provider" and 'on-bus:' for nodes on the bus
instead, which is less confusing.
Support the old keys for backwards compatibility, along with a
deprecation warning.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.
Changes:
- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test
Test: spi_loopback test passed
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Add any useful information from 'title:' to the 'description:' strings
(e.g. explanations of acronyms), and remove 'title:' as well as any
copy-pasted "this binding gives a ..." boilerplate.
Also clean some description strings up a bit.
Some other things could probably be cleaned up (replacing 'GPIO node'
with 'GPIO controller' on controllers for consistency, for example), but
I kept things close to the original to avoid accidentally messing up.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Most bindings look something like this:
title: Foo
description: This binding provides a base representation of Foo
That kind of description doesn't add any useful information, as it's
just the title along with some copy-pasted text. I'm not sure what "base
representation" was supposed to mean originally either.
Many bindings also put something that's closer to a description in the
title, because it's not clear what's expected or how the title is used.
In reality, the title isn't used anywhere. 'description:' on the other
hand shows up as a comment in the generated header.
Deprecate 'title:' and generate a long informative warning if it shows
up in a binding.
Next commits will clean up the 'description:' strings (bringing them
closer to 'title:' in most cases) and remove 'title:' from all bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This is just a cosmetic change to avoid a warning:
"unit-address and first reg (0xb0000000)
don't match for ethernet@e0009800"
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adds spi device tree bindings and nodes for the lpc54xxx and lpc55s6x
socs in preparation for adding a new spi driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The GIC-400 driver currently only supports SPIs because the (32) offset
for the INTIDs is hard-coded in the driver. At the driver level there is
no really difference between PPIs and SPIs so we can easily extend the
driver to support PPIs as well.
This is useful if we want to add support for the ARM Generic Timers that
use INTIDs in the PPI range.
SPI interrupts are in the range [0-987]. PPI interrupts are in the range
[0-15].
This commit adds interrupt 'type' cell to the GIC device tree binding
and changes the 'irq' cell to use interrupt type-specific index, rather
than a linear IRQ number.
The 'type'+'irq (index)' combo is automatically fixed up into a linear
IRQ number by the scripts/dts/gen_defines.py script.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add property for specifying the bus idle timeout for the NXP
i.MX/Kinetis LPI2C I2C controller.
Enabling the bus idle timeout helps the controller to recover from
e.g. EMC causing false clock pulses/spikes on the SCL line.
Without a timeout the LPI2C controller will assume that another bus
master took over the I2C bus and thus refuses to issue a I2C START
condition.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
On power-on boot-ROM is mapped to address 0 in HSDK board.
Normally later when U-Boot gets started by boot-ROM we change mappings
so that real DDR is mapped to entire address space including 0:
https://elixir.bootlin.com/u-boot/latest/source/board/synopsys/hsdk/hsdk.c#L474
But if U-Boot is not started (which is controlled by the BIM dip-switch
on the board) boot-ROM remains mapped to 0, and essentially any attempt
to write to that location fails, thus we cannot upload contents of our
target Elf there even with JTAG.
The next logical option is to use beginning of the non-translated
memory region 0x8000_0000 which we typically use for loading
U-Boot & Linux kernel on ARC boards. But in case of HSDK
we have DCCM (Data Closely-Coupled MEmory - fast on-chip SRAM)
mapped there and since we cannot execute code from DCCM
we need to skip that region as well which gives us the next option
being 0x9000_0000 . That's because DCCM owns entire 256 MiB "aperture"
even though it may have much smaller size up-to 8 MiB.
We are mapping only 5 apertures because the last two
(0xe000_0000-0xffff_ffff) are used for peripherals and AXI.
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Erroring out for 'status = "ok"' broke backwards compatibility for a
downstream project. Accept it instead.
Maybe the error could be selectively re-enabled later.
The rest of the code only checks for 'status = "disabled"' (like the old
scripts), so no other updates are needed.
(It's a bit weird that we duplicate the property check in base.yaml.
Thinking of including base.yaml implicitly. Could clean things up then.)
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add support for the built-in Programmable Interrupt Controller
found in the SweRV EH1 RISC-V CPU
Signed-off-by: Olof Kindgren <olof.kindgren@gmail.com>
After switching to nrfx 2.0.0, the Kconfig choice options that allowed
enabling of pull-up or pull-down for MISO lines in SPIs and SPIMs are
not properly supported, they are simply ignored. This commit restores
the possibility of applying pull configuration for MISO lines.
In earlier nrfx versions, the MISO pull configuration could be only
set globally, in nrfx_config files, for all SPI and SPIM instances
together. Since nrfx 2.0.0, this configuration can be applied per
instance. This commit takes advantage of this possibility and instead
of using a common Kconfig option as a global setting for all instances,
allows applying individual instance settings via devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add new bindings for already supported (by lis2dh.c driver) lsm303agr
accelerometer. Using st,lsm303agr-accel compatible will allow in
subsequent commit to apply different sensitivity scale.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add device tree elements for all gpio ports of the efr32mg12p including
the dts fixup entries.
Also remove gpio port e since this is not available in efr32mg12p socs.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
NXP's LPC family of MCU's GPIOs parameters is udated.
Boards LPC54xxx and LPC55xxx have updated values according
pin and interrupt layout.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit adds basic support for nRF52833 SoC.
Changes affect introducing:
- architecuture files (dtsi)
- configuration of nrfx drivers
- adaptation of inclusions based on chosen SoC
- configuration of NFCT_PINS_AS_GPIOS depends on HAS_HW_NRF_NFCT.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This patch introduces the support of the Low Power Timer
for the STM32WBxx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Provide a clear description of the how the binding maps nexus parent
pin indexes to header pin locations. Also use the standard name "Uno"
when identifying the header physical layout, contrasted with Mega/Due
which is a different physical layout.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Provide information required to allow the driver to put the flash chip
into a deep power down mode. This can reduce standby current by as
much as 90%.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The SPI NOR driver requires that the size (in bits) be provided in the
devicetree node. Update the binding to make the property required,
and update all nodes based on the memory chip identified.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit converts the existing hcm5883l 3-axis magnetometer
driver to use device tree for the I2C and GPIO selection.
It also adds a basic sample application for this sensor, using the
frdm-k64f development board to demonstrate how the interrupt
GPIO pin and I2C bus can be selected.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
This patch introduces the support of the Low Power Timer
for the STM32L4xx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The Generic FSK controller enables radio operation
using a custom GFSK/GMSK or MSK modulation format
achieved by programming a set of PHY variables such
as BT product, modulation index and modulation filter
co-efficients (such that max frequency deviation
<= 500kHz). Generic FSK mode also offers a highly
configurable packet structure, variable bit rate
transmission and reception, some limited packet
(header) processing, and interface to a RAM-based
Packet Buffer.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
The Generic FSK controller enables radio operation
using a custom GFSK/GMSK or MSK modulation format
achieved by programming a set of PHY variables such
as BT product
This binding describes the devices and its associated properties.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Convert bmg160 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert bmm150 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert max44009 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert mcp9808 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sx9500 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert tmp112 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert th02 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Introduce a standard watchdog alias 'watchdog0' that can be utilized
by sample/test code in the future. This helps remove the need for
CONFIG_WDT_0_NAME in dts_fixup.h files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dts pinctrl definitions were pushed in tree without the code
available to deal with it. They have been kept waiting for the
code, but this is taking much more time than initially thought.
So in current zephyr tree, for all STM32 boards, we have pinmux.c
file which is used to configure pins and these files that are
basically no-op. This situation is creating a lot of confusion
especially to new comers, and create useless maintenance effort.
Remove these files for now.
When zephyr will ready to use them, this commit could be reverted.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update lis3mdl-magn dts binding to include GPIO interrupt pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit moves DMA parameters previously hard coded in the driver
to the dts.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a yaml file for help describing generic dma controllers.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update ccs811 dts binding to include GPIO pins for wakeup, reset, and
interrupt and change driver code to get the GPIO pin and controller
info from DT instead of Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update vl53l0x dts binding to include GPIO XSHUT pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no APB2 bus on stm32f0 series.
What could be found as APB2 in CMSIS files is actually
second group of APB (A.K.A APB1_2).
Fix nodes that are using this wrong reference accorss the series.
Fixes#20310
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update the binding for nordic,nrf-temp to require the label property and
use the generated define (DT_INST_0_NORDIC_NRF_TEMP_LABEL) instead of
Kconfig symbol (CONFIG_TEMP_NRF5_NAME).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some chips supported by lis2dh driver (such as LIS2DH12 and LIS3DH)
contain CTRL_REG0 (1Eh) register to control internal pull-up on SDO/SA0
line (enabled by default). Add disconnect-sdo-sa0-pull-up boolean
device-tree property to allow disconnecting pull-up during driver
initialization. This allows to save around 180uA at 3.6V in
accelerometer power-down mode.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Create a common binding file that will be included by all bindings
handled by lis2dh.c driver. For now this includes optional irq-gpios
property.
Use introduced st,lis2dh-common.yaml in st,lsm303dlhc-accel.yaml in
order to support defining irq-gpios.
Also improve description of st,lis2dh-i2c.yaml to better match what can
be found in st,lis2dh-spi.yaml.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Explain how 'include:' works in some more detail and mention base.yaml,
along with an example of how it can be used.
This was adapted from
https://github.com/zephyrproject-rtos/zephyr/pull/19846.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree
Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api
Note:
- timer module interrupt registers shall be removed when
timer driver implemented.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Unlike most other GPIO controllers which support 32 pins this device
only supports 16. (There is an SX1508B that has 8 pins, but the
driver doesn't support it.)
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the 40pin header for the 1.8v IE
96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the most commonly used 30pin header
for the 3.3v IE 96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Do
description: |
instead of
description: >
in the example, to preserve internal newlines in the string. Also link
to https://yaml-multiline.info/, which is handy.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The int, array, string, and string-array property types were not
documented together with the other types, for whatever reason (might've
been too focused on the more complex types and overlooked it). Add
documentation for them.
Also do some minor cleanup on the descriptions, e.g. to make them more
consistent.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
With https://github.com/zephyrproject-rtos/zephyr/pull/20185, multi-line
descriptions will be formatted nicely, but using '>' breaks it, because
it removes internal newlines (including between paragraphs).
See https://yaml-multiline.info/.
Replace 'description: >' with 'description: |' to encourage '|'. That'll
prevent '>' from getting copied around and messing up long descriptions.
This will lead to some extra newlines in the output, but it's fine.
Line-wrapping messes up any manual formatting.
The replacement was done with
$ git ls-files 'dts/bindings/*.yaml' | \
xargs sed -i 's/description:\s*>/description: |/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add bindings for Nordic nRF family peripherals:
- IPC (Interprocessor Communication)
- RNG (Random Number Generator)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
MT9M114 is a CMOS digital image sensor.
Implement video interface.
Only VGA (640x480) supported for now.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The Thingy:52 has a LIS2DH12 low-power accelerometer on the external
I2C bus. Add the necessary description to devicetree.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Make the clkout properties of the NXP Kinetis SIM module device tree
bindings optional since not all boards rely on this clock signal for
clocking external peripherals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the common.dts file which has been used for a year.
common.dts at one point allowed us to conditionally add an MCUBoot
overlay based on Kconfig.
but since DT lost access to Kconfig options it has been unused.
The overridable variable DTS_COMMON_OVERLAYS, which by default points
to common.dts, is also unused in-tree, and any out-of-tree usage can
be ported over to use DTC_OVERLAY_FILE instead, so we remove the
variable as well.
This simplifies the configuration system.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the selection of the IP clock source for the modules in the NXP
Kinetis KE1xF SoCs from being hardcoded in soc.c to being specified in
the device tree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds LiteX SPI drivers and its bindings.
Signed-off-by: Daniel Craviee <dcraviee@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Indtroduction of generic device tree bindings for keyboard scan devices.
In addition, device tree node entries and dt specific bindings where
also implemented for Microchip MEC1501
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.
Signed-off-by: Karl Palsson <karlp@etactica.com>
1. Replace the non-existent CPU device binding ("Cortex-R") specified
by the CPU node with a proper one.
2. Relocate CPU node declaration to SoC dtsi:
The CPU node should be declared in the SoC dtsi because the core
type is SoC-dependent. In fact, this is exactly how it is done in
the Cortex-M port.
3. Remove core_intc (supposedly Cortex-R VIC):
Unlike the NVIC of Cortex-M, the VIC of Cortex-R is not a true
interrupt controller in the conventional sense and merely acts as
a CPU input port for aggregated interrupt request and vector index
signals. For this reason, there is no point in declaring it in the
device tree and specifying it as an interrupt parent. All SoCs
incorporating Cortex-R implement a separate true interrupt
controller (for instance, GIC for Zynq MPSoC and VIM for Hercules).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds device bindings for Cortex-R4(F) and Cortex-R5(F).
These were supposed to be added during the initial development of
Cortex-R port, but it was not due to an incorrect device tree
specification.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Implemented latest extensions to the counter API related to
detection of alarms being set too late and short relative alarms.
Implementation could not be realized on nrfx_rtc driver thus
driver has been reimplemented based on nrf_rtc hal.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The patch adds initial support for STM32F030X4 SoC.
STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
Add #pwm-cells property in bindings for Nordic PWMs and add this
property with a suitable value assigned to all PWM nodes in dts
files for Nordic SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Looking at the code, this flag was probably made 'required: true' by
mistake. Combining 'type: boolean' with 'required: true' for 'ppi-wrap'
means that all nodes that use this binding are required to have a
'ppi-wrap;' property.
The mistake was hidden by a bug in edtlib (failing to flag missing
'required: true' booleans).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Implement a nice generalization suggested by Bobby Noelte.
Instead of having a generic #cells key in bindings, have source-specific
*-cells keys. Some examples:
interrupt-cells:
- irq
- priority
- flags
gpio-cells:
- pin
- flags
pwm-cells:
- channel
- period
This makes bindings a bit easier to read, and allows a node to be a
controller for many different 'phandle-array' properties.
The prefix before *-cells is derived from the property name, meaning
there's no fixed set of *-cells keys. This is possible because of the
earlier 'phandle-array' generalization.
The older #cells key is supported for backwards compatibility, but
generates a deprecation warning.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Generating generic information for 'type: phandle-array' properties in
edtlib was difficult due to defining phandle-array as just a list of
phandles and numbers. To make sense of a phandle-array property like
'pwms', you have to know that #pwm-cells is expected to appear on
each referenced controller, and that the binding for the controller has
a #cells.
Because of this, handling of various 'type: phandle-array' properties
was previously hardcoded in edtlib and exposed through properties like
Node.pwms, instead of through the generic Node.props (though with a lot
of shared code).
In practice, it turns out that all 'type: phandle-array' properties in
Zephyr work exactly the same way: They all have names that end in -s,
the 's' is removed to derive the name of related properties, and they
all look up #cells in the binding for the controller, which gives names
to the data values.
Strengthen the definition of 'type: phandle-array' to mean a property
that works exactly like the existing phandle-array properties (which
also means requiring that the name ends in -s). This removes a ton of
hardcoding from edtlib and allows new 'type: phandle-array' properties
to be added without making any code changes.
If we ever need a property type that's a list of phandles and numbers
but that doesn't follow this scheme, then we could add a separate type
for it. We should check if the standard scheme is fine first though.
The only property type for which no information is generated is now
'compound'.
There's some inconsistency in how we generate identifiers for clocks
compared to other 'type: phandle-array' properties, so keep
special-casing them for now in gen_defines.py (see the comment in
write_clocks()).
This change also enabled a bunch of other simplifications, like reusing
the ControllerAndData class for interrupts.
Piggyback generalization of *-map properties so that they work for any
phandle-array properties. It's now possible to have things like
'io-channel-map', if you need to.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit introduces separate "compatible" strings for DTS nodes
representing different types of Nordic SPI peripherals. Previously
"nordic,nrf-spi" was used for both SPI and SPIM. SPIS was already
handled separately.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/spi/
new binding for "nordic,nrf-spim" is added and common fields for all
3 types of Nordic SPI peripherals are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in spiX nodes are updated (when there is no
choice as only one type of SPI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/spi/
spi_nrfx_spim driver is updated with the new form of macros generated
from dts
* boards/
all spiX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of SPI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (SPI_x_NRF_SPI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit introduces separate "compatible" strings for dts nodes
representing different types of Nordic TWI peripherals. Previously
"nordic,nrf-i2c" was used for both TWI and TWIM, and TWIS was not
supported.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/i2c/
new bindings for "nordic,nrf-twim" and "nordic,nrf-twis" are added
and the one for "nordic,nrf-i2s" is renamed to "nordic,nrf-twi",
common fields for all these bindings are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in i2cX nodes are updated (when there is no
choice as only one type of TWI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/i2c/
both flavors of i2c_nrfx drivers are updated with the new names of
macros generated from dts
* boards/
all i2cX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of TWI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (I2C_x_NRF_TWI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the new 'compatible:' and 'include:' syntaxes, and clean it up like
for other bindings.
Shorten the description, because it appears in the output as a comment
above the generated macros, and it looks neater. I asked Mateusz what
kind of device it is.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Use the new 'compatible:', 'include:', and 'required:' keys, and clean
it up like other bindings.
Shorten the 'description:' text, because it appears in the output as a
comment above the generated macros, and it looks neater.
Fixes: #19385
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add support for up-and-down counter mode, which aligns the center of
each channel's pulses instead of their initial edges. This is enabled
on a PWM periphral by adding the "center-aligned" property to the
device tree, e.g.:
&pwm0 {
status = "okay";
center-aligned;
ch0-pin = <15>;
ch1-pin = <17>;
ch1-inverted;
};
Signed-off-by: Jim Paris <jim@jtan.com>
Use the device tree to assign the correct peripheral clock to each
UART/USART/LEUART. Previously, the clock identifier was determined
through the sequence number of the instantiated UART. This meant
configuring all UARTs when only one of the later UARTs was required.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
This adds support for Kinestis K22
Co-authored-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Co-authored-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Co-authored-by: Tom Burdick <thomas.burdick@gmail.com>
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
This commit adds driver supporting reading DNA ID value for LiteX SoC
builder.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Enable LiteX DNA ID driver in litex_vexriscv board.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Deprecate 'sub-node:' and add a more general 'child-binding:' mechanism
to bindings. Keep supporting 'sub-node:', but print a deprecation
warning when it's used.
Like 'sub-node:', 'child-binding:' gives a binding to child nodes, but
the binding is required to be a complete binding, and is treated (and
checked) like a normal binding.
'child-binding:' can in turn contain another 'child-binding:', up to any
number of levels. This is automatic from treating it like a normal
binding, and from the code initializing parent Devices before child
Devices.
This lets nodes give bindings to grandchildren.
For example, take this devicetree fragment:
parent {
compatible = "foo";
child-1 {
grandchild-1 {
...
};
grandchild-2 {
...
};
};
child-2 {
grandchild-3 {
...
};
};
};
The binding for 'foo' could provide bindings for grandchild-1/2/3 like
this:
compatible: "foo"
# Binding for children
child-binding:
title: ...
description: ...
...
# Binding for grandchildren
child-binding:
title: ...
description: ...
properties:
...
Due to implementation issues with the old devicetree scripts, only two
levels of 'child-binding:' is supported for now. This limitation will go
away in Zephyr 2.2.
Piggyback shortening 'description:' and 'title:' in some bindings that
provide child bindings. This makes the generated header a bit neater.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The arc_iot.dtsi used "intel,qmsi-ss-gpio" and "intel,qmsi-ss-i2c"
compatiables, however we have no drivers for these and it seems wrong
that the ARC platform would utilize such compatiables. Remove the
compatiable fields for now (proper one's can be added when there are I2C
and GPIO drivers for this platform).
Also remove the binding files associated with "intel,qmsi-ss-gpio" and
"intel,qmsi-ss-i2c" as nothing in tree utilizes them.
Fixes: 19227
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instead of
child:
bus: foo
parent:
bus: bar
, have
child-bus: foo
parent-bus: bar
'bus' is the only key that ever appears under 'child' and 'parent'.
Support the old keys for backwards compatibility, with a deprecation
warning if they're used.
Also add 'child/parent-bus' tests to the edtlib test suite. It was
untested before.
I also considered putting more stuff under 'child' and 'parent', but
there's not much point when there's just a few keys I think. Top-level
stuff is cleaner and easier to read.
I'm planning to add a 'child-binding' key a bit later (like 'sub-node',
but more flexible), and child-* is consistent with that.
Also add an unrelated test-bindings/grandchild-3.yaml that was
accidentally left out earlier.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add support to STM IIS3DHHC the ultra-low noise, high-stability
three-axis linear accelerometer.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
4 are found: 2 with a counter of 16bits and 2 with a counter of 32 bits.
However, first 32bits instance will not be exposed as it will be used by
rtos timer driver directly to implement k_busy_wait()
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32wb SoC. Enable the independent watchdog
for the stm32wb series for use with this driver.
Signed-off-by: Robert Weber <robertweber95@gmail.com>
The LIS2MDL is not a combo device, but pure magnotemeter.
Hence, '-magn' extension is not adding information and can
be removed from dts compatible name as well as binding filename.
Instead specify '-i2c' or '-spi' to distinguish between the names.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
XIP support in x86 was something of a mess. This
patch does the following:
- Generic ia32 SOC no longer defines a "flash" region
as generic X86 devices don't have a microcontroller-
like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
The board definition must provide a flash region definition
that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
removed.
- qemu_x86 has a fake flash region added, immediately after system
RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
XIP by default, plus an additional test to exercise XIP on
qemu_x86 (which supports it but has XIP switched off by default)
The overall effect of this patch is to:
- Remove XIP configuration for SOC/boards where it does not make
any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
it off by default for other tests, to ensure it doesn't bit-rot
and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.
Fixes: #18956
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The KE1xF SoC family SIM unit differs from the other Kinetis family
SoCs. Add a unique compatiable and binding for it.
Fixes#18160
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When foo.yaml set some property 'required: true' and bar.yaml set the
same property 'required: false', the check for changing
'required: false' to 'required: true' would raise an error for
include: [bar.yaml, foo.yaml]
(with that particular order due to implementation details).
The order files are included in shouldn't matter. To fix it, change the
logic so that 'required' values are ORed together between included files
(so that 'required: true' is always respected), and remove the
'required' true-to-false check when merging included files.
Keep the true-to-false check when merging the (merged) included files
into the main binding (the binding with the 'include:' in it). This
might give a good organization, and the old scripts do it too.
Piggyback two fixes/cleanups:
- 'compatible' should be allowed to appear in included files
- No need to allow an 'inherits' key in _check_binding(), because
it has been removed before then, when merging bindings
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
- hw-flow-control added to uart.yaml as it is a common feature
- cleanup other related yaml files
- change property 'category' to 'rquired' in yaml files
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Fixes#3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig
Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts
- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs
- Old Silicon rev is not supported
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
