Fixed AF for USART 6 on PC6/PC7 PG8/PG9/PG12/PG13/PG14/PG15
All RTS/CTS/RX/TX pins now have correct AF7 instead of wrong AF8.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.
Several minor pinmux errors have also been fixed.
Sorted by Alternate function.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.
Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Changes:
- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4
Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.
This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Update dtsi and pinmux macros for stm32f7 family. Add sdmmc1 to dts file
for stm32f746g_disco. Also add board specific configuration file for
fat_fs sample.
Signed-off-by: Helge Juul <helge@fastmail.com>
Update the dtsi for stm32l471 (which the higher SoCs are based on) to
support the stm32-sdmmc disk access device. Enable the device for the
stm32l496g_disco board, and update the pinmuxing.
Note that the stm32l496g_disco board also has a card detect gpio
(MFX_GPIO8), but this is not supported yet. When not specified the
driver will assume a card is present.
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Add support for ADC on H7 series. Note that ADC1 and ADC2 share the same
register set, so it is added as "adc1_2".
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Like stm32 L4 does,
when the STM32WBx SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
* Define USB driver for base stm32wb device.
* Enable USB for the nucleo_wb55rg board.
* Properly initialize USB power + clock for the platform.
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
Fix some wrong assignments for SPI2 and add all other alternative
functions for USART, I2C, SPI and CAN according to STM32F091VC
datasheet, which is at the top end of this series.
https://www.st.com/resource/en/datasheet/stm32f091vc.pdf
Signed-off-by: Martin Jäger <martin@libre.solar>
Add I2C1 SDA/SCL configuration on pins PA9 and PA10, as they are
currently only available on other pins.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
When the STM32L4x SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Most of the MISO and MOSI SPI pins of STM32L4 SoCs are configured with
a pull-down except PE14 and PE15. Change them for consistency.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
LPUART1 TX alternate function number for PB6 was not correct in the
pinmux settings for H7 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This patch is setting the pin to very high speed for all
the SPI2 clock outputs, for the stm32f7 soc series.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Ensure that the SPI SCK and MOSI pins are set to very high as slower
SPI speeds will cause device hangs when used. This is due to the state
changing too fast for hardware, causing RXE to never fire and thus
hang.
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Add support for the ST STM32G0316-DISCO development board. This board
features an ST STM32G031J6 MCU on a breakable SO8 to DIL8 module, a user
LED and a button.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.
Changes:
- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test
Test: spi_loopback test passed
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
This commit adds:
1. pin definitions for SPI1 on PE12-15 on STM32L4 devices
2. SPI3 on PA15_SPI3_NSS
Signed-off-by: Armando Visconti <armando.visconti@st.com>
To work efficiently, SPI_NSS pins require pull-up configuration.
Fix this for whole STM32 series.
Fixes#17998
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes#16739. Changed the STM32's SPI MISO/MOSI configurations in order
to reduce the power consumption by approximately 20uA per pin.
According to STM32's Application Notes on GPIO configuration for
low-power consumption, the input pins should be configured with internal
pull-up or pull-down resistor. If a pin is configured as a floating
input, and there is no signal present, the Schmitt trigger randomly
toggles between the logical levels induced by the external noise, thus
increasing the consumption.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition
Signed-off-by: Findlay Feng <i@fengch.me>
