Commit graph

58 commits

Author SHA1 Message Date
Andrew Boie 45979dafb4 linker: add iterable section macros
For iterable areas defined with Z_STRUCT_SECTION_ITERABLE(),
the corresponding output section in the linker script is just
boilerplate. Add macros to make these definitions simpler.

Unfortunately, we have a fair number of iterable sections not
defined with Z_STRUCT_SECTION_ITERABLE(), this patch does not
address this.

The output sections are all named <struct name>_area, update
sanitylib.py with this.

sys_sem with no userspace, and k_lifo/k_fifo are special cases
where different data types that are all equivalent need to be
put in the same iterable area. Add
Z_STRUCT_SECTION_ITERABLE_ALTERNATE() for this special case.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-24 17:09:22 -04:00
Andrew Boie 299ec8f1b5 userspace: net sockets are kernel objects
Any data structure declaration tagged with __net_socket will end up
in the kernel object table with type K_OBJ_NET_SOCKET. These all
correspond to objects which are associated with socket file
descriptors and can handle the socket vtable API.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-03 22:33:32 +02:00
Daniel Leung 04a3d9906c toolchain: Fix warning about too few arguments on BUILD_ASSERT()
Commit c408fa88a3 introduced changes
to the BUILD_ASSERT() macro so the MSG argument is optional.
However, in include/toolchain/common.h, the BUILD_ASSERT()
definition has not made the MSG argument as optional which results
in build errors complaing about too few arguments. Fix by adding
some dots there.

This is observed when using XCC (based on Clang 3.9).

Fixes #24008

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-11 11:09:20 -04:00
Oleg Zhurakivskyy c408fa88a3 toolchain: common: Merge build assert macros
In order to de-duplicate 2 macros with the same use,
merge BUILD_ASSERT(), BUILD_ASSERT_MSG() into one macro.

Make BUILD_ASSERT_MSG() deprecated.

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-31 07:18:06 +02:00
Carles Cufi cd38fb1610 Revert "toolchain: common: Merge build assert macros"
This reverts commit 974aa3add4.

Pull Request #23437 was merged by mistake with an invalid manifest.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-03-19 18:45:13 +01:00
Oleg Zhurakivskyy 974aa3add4 toolchain: common: Merge build assert macros
In order to de-duplicate 2 macros with the same use,
merge BUILD_ASSERT(), BUILD_ASSERT_MSG() into one macro.

Make BUILD_ASSERT_MSG() deprecated.

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-19 15:47:53 +01:00
Corey Wharton ccd15df510 scripts: Dynamically add driver subsystems to subsystems list
This change extends the parse_syscalls.py script to scan for a
__subsystem sentinal added to driver api declarations. It thens
generates a list that is passed into gen_kobject_list.py to extend
the subsystems list. This allows subsystems to be declared in the
code instead of a separate python list and provides a mechanism for
defining out-of-tree subsystems.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-03-11 17:13:39 +02:00
Daniel Leung b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Nicolas Pitre 1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Anas Nashif f2cb20c772 docs: fix misspelling across the tree
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-19 15:34:13 -05:00
Nicolas Pitre aa9228854f linker generated list: provide an iterator to simplify list access
Given that the section name and boundary simbols can be inferred from
the struct object name, it makes sense to create an iterator that
abstracts away the access details and reduce the possibility for
mistakes.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-06 14:21:32 -07:00
Nicolas Pitre b1d3742ce2 linker generated list: introduce Z_STRUCT_SECTION_ITERABLE()
This convenience macro wraps Z_DECL_ALIGN() and __in_section() to
simplify static definitions of structure instances gathered in dedicated
sections. Most of the time those go together, and the section name is
already closely related to the struct type, so abstracting things behind
a simpler interface reduces probability of mistakes and makes the code
clearer. A few input section names have been adjusted accordingly.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-06 14:21:32 -07:00
Nicolas Pitre 8bb1f2a947 linker generated list: explicit alignment on data definitions
The alignment fix on struct device definitions should be done to all
such linker list tricks. Let's abstract the declaration plus alignment
with a macro and apply it to all concerned cases.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-06 14:21:32 -07:00
Daniel Leung 84b1bba8ee codecov: keep "inline" for ALWAYS_INLINE
Previous commit c31e659165 changed
the ALWAYS_INLINE macros to avoid functions being inlined for
the purpose of code coverage. This has a side effect of causing
the text sections of kobject_hash.c and priv_stacks_hash.c
to ballon more than 10 times in size. This is caused by
attaching the unused attribute, which results in all those
functions being in the text sections though they are never
used. So just keep the "inline" there.

This also removes -fno-inline from NO_COVERAGE_FLAGS so these
two files are not compiled with flags related to code coverage.

Fixes #15009

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-04-02 09:39:44 -04:00
Daniel Leung c31e659165 codecov: avoid inlining functions for correct execution counts
This adds a compiler option -fno-inline for code coverage on
architectures which supports doing code coverage. This also
modifies the ALWAYS_INLINE macro to not do any inlining. This
needs to be done so code coverage can count the number of
executions to the correct lines.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-03-26 13:28:30 -04:00
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Ulf Magnusson e569533de0 toolchain: Remove ref. to undefined sym. CONFIG_ISA_THUMB
This symbol has never been defined in the Git history.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-02 03:46:10 +01:00
Andy Ross b69d0da82d arch/x86_64: New architecture added
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().

The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.

Limitations:

+ Right now the SDK lacks an x86_64 toolchain.  The build will fall
  back to a host toolchain if it finds no cross compiler defined,
  which is tested to work on gcc 8.2.1 right now.

+ No x87/SSE/AVX usage is allowed.  This is a stronger limitation than
  other architectures where the instructions work from one thread even
  if the context switch code doesn't support it.  We are passing
  -no-sse to prevent gcc from automatically generating SSE
  instructions for non-floating-point purposes, which has the side
  effect of changing the ABI.  Future work to handle the FPU registers
  will need to be combined with an "application" ABI distinct from the
  kernel one (or just to require USERSPACE).

+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
  of all memory.  No MMU/USERSPACE support yet.

+ We are building with -mno-red-zone for stack size reasons, but this
  is a valuable optimization.  Enabling it requires automatic stack
  switching, which requires a TSS, which means it has to happen after
  MMU support.

+ The OS runs in 64 bit mode, but for compatibility reasons is
  compiled to the 32 bit "X32" ABI.  So while the full 64 bit
  registers and instruction set are available, C pointers are 32 bits
  long and Zephyr is constrained to run in the bottom 4G of memory.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-01-11 15:18:52 -05:00
Flavio Ceolin 67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Leandro Pereira 05169a02ce toolchain: common: Allow multiple uses of BUILD_ASSERT() in same scope
BUILD_ASSERT() was always defining a type with the name
__build_assert_failure, causing issues if more than one assertion were
used in the same scope.

Also, use an enum instead of a typedef to avoid (possibly spurious)
warnings such as these:

  variably modified ‘__build_assert_failure1’ at file scope [-Werror]

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-24 04:04:36 +05:30
Leandro Pereira 81f4b11126 include: toolchain: common: Remove deprecated __stack macro
This macro has been deprecated in favor of K_DECLARE_STACK; should have
been removed by 1.11.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-23 10:11:08 -07:00
Anas Nashif ce74393267 toolchain: gcc/common: add header guard
Added guards to the toolchain/gcc.h and toolchain/common.h

Those files should never be included directly, but a guard is useful
regardless.

Fixes #5130

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-02-10 11:14:32 -05:00
Alberto Escolar Piedras 76f7644118 arch: native: Run Zephyr natively in a POSIX OS
A new arch (posix) which relies on pthreads to emulate the context
switching
A new soc for it (inf_clock) which emulates a CPU running at an
infinely high clock (so when the CPU is awaken it runs till completion
in 0 time)
A new board, which provides a trivial system tick timer and
irq generation.

Origin: Original

Fixes #1891

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-27 14:16:08 -05:00
Inaky Perez-Gonzalez 7bc28cf388 syscalls: REVERTME: clean up warnings when building unit tests
This is a temporary hack until #5006 is resolved (possibly using

https://github.com/zephyrproject-rtos/zephyr/issues/5006

Unit testing (BOARD == unit_testing) doesn't need the system call
definitions. Because we foward declare with __syscall them as "static
inline" (from common.h), the compilers will complain that the
definition is missing.

Change to only define __syscall as "static inline" if we are not
builing a unit test to avoid said warnings.

Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2017-11-15 19:09:12 -05:00
Andrew Boie 990bf16206 kernel: abolish __syscall_inline
This used to exist because in earlier versions of the system call
interfaces, an "extern" declaration of the system call implementation
function would precede the real inline version of the implementation.
The compiler would not like this and would throw "static declaration
of ‘foo’ follows non-static declaration". So alternate macros were
needed which declare the implementation function as 'static inline'
instead of extern.

However, currently the inline version of these system call
implementations appear first, the K_SYSCALL_DECLARE() macros appear in
the header generated by gen_syscalls.py, which is always included at the
end of the header file. The compiler does not complain if a
static inline function is succeeded by an extern prototype of the
same function. This lets us simplify the generated system call
macros and just use __syscall everywhere.

The disassembly of this was checked on x86 to ensure that for
kernel-only or CONFIG_USERSPACE=n scenarios, everything is still being
inlined as expected.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-03 16:16:03 -04:00
Andrew Boie 9928023421 kernel: make 'static inline' implicit to __syscall
The fact that these are all static inline functions internally is an
implementation detail.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-29 15:09:44 -07:00
Andrew Boie 680ca8c944 toolchain/common.h: deprecate __stack
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 18:53:28 -04:00
Max Filippov 5c6276da72 toolchain: don't define __stack outside C code
__stack is defined as a C language attribute for on-stack arrays. Don't
define it outside C source code.
This definition conflicts with __stack symbol defined in xtensa linker.ld
files.

Change-Id: I59fe34603bc2bb5732ed45c7974de5f8b25d77ed
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-04-20 16:01:17 +00:00
Marti Bolivar 7e61e70b15 toolchain: add BUILD_ASSERT_MSG()
Like BUILD_ASSERT(), but with a message to emit on failure.

The base implementation swallows the message; compiler headers can
override it when they can do better.

Change-Id: Ib724e48554da77a51afa01468b1d5b7806f9de6b
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-04-01 20:35:45 +00:00
Marti Bolivar f8c9c5444a toolchain: allow compiler to provide BUILD_ASSERT
Change-Id: Id71d5499d0bd8141062f854a814bd882db470323
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-04-01 20:35:44 +00:00
Andrew Boie 42562b9367 xtensa: fix numerous checkpatch issues
Change-Id: I903f5f0692849fb9e7bf5d978b63b12bf1bd6e33
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 11:39:03 -08:00
Mazen NEIFER dc391f566c Xtensa port: Added support for Xtensa architecture in zephyr include files.
Change-Id: I1ac677cd6da5222707fe31ead71dc354f7c94443
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Jean-Paul Etienne cd83e85edc arch: added support for the riscv32 architecture
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.

1) exceptions/interrupts/faults are handled at the architecture
   level via the __irq_wrapper handler. Context saving/restoring
   of registers can be handled at both architecture and SOC levels.
   If SOC-specific registers need to be saved, SOC level needs to
   provide __soc_save_context and __soc_restore_context functions
   that shall be accounted by the architecture level, when
   corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.

2) As RISC-V architecture does not provide a clear ISA specification
   about interrupt handling, each RISC-V SOC handles it in its own
   way. Hence, at the architecture level, the __irq_wrapper handler
   expects the following functions to be provided by the SOC level:
   __soc_is_irq: to check if the exception is the result of an
                 interrupt or not.
   __soc_handle_irq: handle pending IRQ at SOC level (ex: clear
                     pending IRQ in SOC-specific IRQ register)

3) Thread/task scheduling, as well as IRQ offloading are handled via
   the RISC-V system call ("ecall"), which is also handled via the
   __irq_wrapper handler. The _Swap asm function just calls "ecall"
   to generate an exception.

4) As there is no conventional way of handling CPU power save in
   RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
   functions just unlock interrupts and return to the caller, without
   issuing any CPU power saving instruction. Nonetheless, to allow
   SOC-level to implement proper CPU power save, nano_cpu_idle and
   nano_cpu_atomic_idle functions are defined as __weak
   at the architecture level.

Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-13 19:52:23 +00:00
Carles Cufi bb9f432dc1 toolchain: Add BUILD_ASSERT macro for compile-time checks
This new macro will trigger a build failure if the compile-time
check fails. Useful for checking static conditions such as
structure sizes or offsets.

Change-Id: I417ea816003b97beb1b5f15bc583c38691f0b8a9
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-10-03 19:41:08 +00:00
Andy Ross 9f628943a8 toolchain: Remove vestigial COFF assembler symbol mangling support
The toolchain headers included an abstraction for defining symbol
names in assembly context in the situation where we're using a
DOS-style assembler that automatically prepends an underscore to
symbol names.

We aren't.  Zephyr is an ELF platform.  None of our toolchains do
this.  Nothing sets the "TOOL_PREPENDS_UNDERSCORE" macro from within
the project, and it surely isn't an industry standard.  Yank it out.
Now we can write assembler labels in natural syntax, and a few other
things fall out to simplify too.

(NOTE: these headers contain assembly code and will fail checkpatch.
That is an expected false positive.)

Change-Id: Ic89e74422b52fe50b3b7306a0347d7a560259581
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2016-08-30 19:01:11 +00:00
Andrew Boie 6539fbd453 toolchain/common.h: remove comment
4 is the correct value for this arch, the CPU will freak out
if functions aren't 4-byte aligned.

Change-Id: I3d6742516cb323680ab1f9fe7b1a88de1fbf1fae
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-29 05:23:55 +00:00
Andrew Boie ced164e14f toolchain: common.h: define PERFOPT_ALIGN for Nios2
This is just a temporary value for now, need to research the best
value to use.

Change-Id: Icaadf75fa3ae98b087f3d51813f85003f398f378
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:47 +00:00
Peter Mitsis 36a2ae3184 c++: Add TASK_ENTRY_CPP to C++ task entry points
The TASK_ENTRY_CPP macro is to be used to tag task entry points when
they are defined in a C++ file.

Change-Id: I213965cf55648f54972e1e95bf5b4269f03fd44d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:22 -05:00
Peter Mitsis babea6d2dd c++: Add EXTERN_C macro
The EXTERN_C macro is to be used to ensure compatibility between C and C++;
It prevents name mangling in C++ environments.

Change-Id: I33be727150687901f7770306c8a07c16a7e46ffa
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:22 -05:00
Anas Nashif 275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Juan Manuel Cruz b798c0adad devices: _PASTE macro relocated from init.h to common.h
The _PASTE and _PASTE2 macros are relocated from init.h (device handling) to
toolchain/common.h for better reuse.
_PASTE and PASTE_2 macro are renamed to _CONCAT and _DO_CONCAT.
These names are more descriptive.

Change-Id: Ie2f5b0cba1f1179eb3fb5ec00236a75a73267f98
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:56 -05:00
Dmitriy Korovkin e6e9237d41 toolchain: added macro for converting argument to a string
Change-Id: I71f824d1a309b836122a7dd2a74530a4c6d613b2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:54 -05:00
Anas Nashif 77ba3c3b8b kconfig: define architecture as a kconfig variable
Do not depend on environment variables and use a kconfig variable
for defining the architecture.

In addition, remove the X86_32 variable, it just duplicates X86 for
not good reason, at least until start supporting MCUs with 64bit.

Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:52 -05:00
Andrew Boie 8a2104e16a x86: remove CONFIG_UNALIGNED_WRITE_UNSUPPORTED
This had bit-rotted to the point where it was breaking the build
and was only needed on legacy platforms that are no longer
supported.

Change-Id: I4fcfc38bacac58761fba475701e0c27d7b8b7a27
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Dan Kalowsky 2a63743192 cleanup: removing NOMANUAL
The \NOMANUAL tag is a remnant from days of yore and is no longer
needed or useful.  Cleaning up the code references to this.

Change-Id: I1b8cc9c9560d1dbb711f05fa63fd23386789875c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:35 -05:00
Dan Kalowsky da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 39063598db checkpatch: error - spacing
Change-Id: Ie6e1c43581dd4b0734625b3a4e59a4ca79619e99
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:31 -05:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Anas Nashif ea0d0b220c doxygen: change comment style to match javadoc
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.

Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00