This commit introduces boards/deprecated.cmake to allow deprecation
of existing boards, when a board is renamed.
This allows users to still specify the old board name, and let Zephyr
build system to select the new board name.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit reworks the Xilinx TTC timer driver to use the "match" mode
instead of the "interval" mode which counts up to the specified value
and resets to zero.
Using the "match" mode ensures that the timer keeps counting even after
an interrupt is triggered, and facilitates the tickless mode support
implementation.
This also allows `z_timer_cycle_get_32` to return the correct cycle
count when interrupt is locked; thereby, fixing the k_busy_wait hang
issue.
Note that the TTC "match" mode emulation (and tickless timer operation)
is only stable when the QEMU icount mode is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Since we already have similarly licensed 3-clause BSD files in the tree,
and in particular in our minimal libc, move the fnmatch functionality
from ext/ to lib/.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
IP ethernet switch board includes K66F MCU from NXP
and Micrel/Microchip KSZ8794CNX switch. Board support
includes basic GPIO LED and common functions.
Switch function needs support either based on DSA or
relative feature in Zephyr which is tracked with issue
22061.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Add entropy driver based on GECKO TRNG module along with device
tree support for EFM32PG and EFR32MG SOCs.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
Split up requirements.txt into several files so that CI tools can
utilize/reference the specific requirements-<FOO>.txt they may need
while keep things in sync with the development. This is to reduce
both time and amount of work CI actions due to python package install.
Create the following groupings:
1. BASE - needed to build or create zephyr images
2. BUILD-TEST - need to run compile/build tests
3. DOC - need to build the docs
4. RUN-TEST - need for runtime testing
5. EXTRAS - optional or useful for development/developers workflow
Also tried to add a comment about what or why a given package is being
pulled in for.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This never needed to be put in a separate gperf table.
Privilege mode stacks can be generated by the main
gen_kobject_list.py logic, which we do here.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add Platform Environment Control Interface API
This API defines following calls:
- peci_configure
- peci_enable
- peci_disable
- peci_transaction
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
daor-oti and wopu-ot also want to be added automatically as
reviewers to POSIX arch, native_posix, nrf52_bsim and bsim
related test apps.
(see CODEOWNERS for more info about which each is interested on)
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Add @stephanosio as a code owner for the Xilinx ZynqMP platform, which
is used as the primary testing platform for the Cortex-R architecture.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Replace running west command tests in run_ci.sh with a github workflow.
This provides some benefits in that we can run the west command tests on
multiple python versions and host OSes (linux, mac and windows).
Also have the benefit that the tests are only run on modifications to
files in scripts/west_commands/ or scripts/west-commands.yml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add script to capture tracing stream data with UART backend. This
script is developed based on pyserial, so install it correctly
before using the script.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
This commits adds GPIO driver for LiteX SoC builder.
Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API.
Tested on external SX1509B breakout board and Thingy:52.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Test that the new port API functions all behave as expected, including
physical vs logical level for input and output as well as masked and
set-based output operations. Also tests the new pin API functions.
For running on real hardware this test now uses a local test-specific
devicetree binding. For build-only tests any platform with a GPIO
alias should be tested.
The new code increases flash requirements so add a filter to exclude
platforms that won't link.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Watchdog type is found on e.g. Pearl/Jade Gecko, often
more than 1 is present.
Driver supports timeout and (minimum) window configuration
and reset or timeout interrupt support for now.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Add a script that sets up Docker networking and starts the net-tools
Docker container. If successful, run Zephyr with native_posix and
execute the appropriate net-tools container executable. The proper
net-tools executable and arguments is selected depending on the
basename of the sample directory. This script needs to be updated
if the net-tools Docker image is updated in some incompatible way.
The net-tools directory is assumed to exist at the same level as
the Zephyr base directory, but its location can be set using the
'-N' command line argument. Likewise, '-Z' sets the Zephyr top level
directory.
When stopping Zephyr, go through all child processes since running a
native posix or other variant of Zephyr may cause a hierarchy of
processes to be created.
Fixes: #19540
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Introduce the basic ARM64 architecture support.
A new CONFIG_ARM64 symbol is introduced for the new architecture and new
cmake / Kconfig files are added to switch between ARM and ARM64.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
There are various situations where it's necessary to support turning
devices on or off at runtime, includin power rails, clocks, other
peripherals, and binary device power management. The complexity of
properly managing multiple consumers of a device in a multithreaded
system suggests that a shared implementation is desirable. This
commit provides an API that supports managing on-off resources.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit adds initial support for the Silicon Labs EFM32
Giant Gecko GG11 StarterKit.
Features supported for now are NVIC, SysTick, GPIO, Flash,
Counter, I2C, UART and Ethernet. Support for Watchdog and
ADC will follow as soon as their respective PRs are merged.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Add support for storing the CANopen object dictionary to non-volatile
storage.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a Zephyr driver and abstraction layer for use by the 3rd party
CANopenNode module.
CANopenNode depends on the CO_driver.h file for platform-specific type
definitions, locking primitives, and CAN bus driver API.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move LVGL sample from samples/gui/lvgl to samples/display/lvgl to have
a unified location for display related samples.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
As of January 2020, David is no longer working on the Zephyr
documentation, so he should not be automatically added as reviewer.
I've commented out rather than removed the lines so when a replacement
is found, the lines can easily be added back.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).
The functionality is split into two drivers; an ADC driver and a GPIO
driver.
Tested with LMP90080 and LMP90100.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
PWM driver for LiteX SoC builder was created.
Because LiteX supports only one channel for each PWM device,
an appropriate restriction was made.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds I2C bitbang driver for LiteX SoC builder with its bindings.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds PRBS ranom number generator driver for
LiteX SoC builder with its bindings.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds support for the EC (embedded controller) on a Google
reference board with codename "kukui". This board uses the STM32F098RC
chip. We built an application for the board and verified UART
functionality on the board.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
wdt_install_timeout() was skipped as it installs an ISR-context
callback handler function. The rest are simple wrappers.
Added myself as the maintainer of the syscall handlers. WDT
subsystem appears to not currently have an owner.
Fixes: #21432
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
net/lib/config/ is important generic part of the network stack, and
should be reviewed by the same people as net/lib/. (Besides, I
originally factored out this lib in the first place.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Added leak suppression, by implementing __lsan_default_suppressions
function, for SDL2 and X11 library which are used by the SDL display
driver.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
gen_syscall_header.py is not longer necessary, it was just creating a
file including syscall.h. This header is now included directly by
gen_syscalls.py.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Szymon was removed from all Bluetooth paths a while ago, and this is
simply an overlooked leftover.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
/lib/libc/ was listed twice in the file
The first entry was overriden by the 2nd
And so was the case for
/samples/bluetooth/
In this second case, the override lost a user, so add it
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
There were two conflicting entries for sensor samples, which resulted in
the wrong person getting assigned as a reviewer.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add API for accessing Electrically Erasable Programmable Read-Only
Memory (EEPROM) devices.
EEPROMs have an erase block size of 1 byte, a long lifetime, and allows
overwriting data on byte-by-byte access.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add myself to owner of subsys/logging/log_backend_net.c so
that if there are changes to that file, I get notified.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.
Notice due to some bugs, this is currently not working with f7.
There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.
Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.
This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.
Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.
This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Add shell commands for setting PWM period and duty cycle (in cycles,
microseconds, or nanoseconds).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
1) Add cryptographically secure random functions to provide
FIPS 140-2 compliant random functions.
2) Add name to random function choice selectors to ease
selection in SOC .defconfig files
3) Add bulk fill random functions.
Signed-off-by: David Leach <david.leach@nxp.com>
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Not a top-level zephyr core API and tied to third party environment, so
move it to where the code is in lib/updatehub.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.
() Removes the x86_64:x32 architecture and SoC, and replaces
them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Charles Youse (@gnuless) has left the organization. I will be
taking over most of his areas of ownership, with Daniel minding
the DW I2C driver.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Script to be used when creating a release. For regular releases this can
be called this way:
$ list_issues.py -f issues.md -s 2019-09-01
Will list all closed issues since september 1st, 2019 and will create a
markdown file with all issues that can be added as is to the release
notes.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The valgrind suppression file did not have an owner
That file is only usefull for POSIX arch based boards
=> Adding myself as owner of the file
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Reimplementation of clock control driver for nrf platform. It includes
latest API changes: asynchronous starting and getting clock status.
Additionally, it implements calibration algorithm which optionally
skips calibration based on no temperature change. Internal temperature
sensor is used for that.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
