The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: Ia252958d205e0100d1b92e2a12d4c22411bc94b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: I79b142414143bc5ef585d3136a00375233de1723
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is in preparation to move SoC and board kconfig defaults
to be parsed later.
Change-Id: If24bdf310dac7034da63f34c0e2add173fe75844
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a debug option to print defaults and their conditions
inside config description under menuconfig/xconfig. This aids in
debugging of kconfig creation.
Change-Id: Ie651435f6b2115dac1bd3a6f7a1b3c2df3c9b0ed
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is a temperature and atmospheric pressure chip. The datasheet is
available at:
https://www.adafruit.com/datasheets/BST-BMP280-DS001-11.pdf
Change-Id: I3406eb6c2c4da564757b8315323d0681d648b541
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Added device power management hook infrastructure. Added
DEVICE_INIT_PM and SYS_INIT_PM macros that creates device
structures with the supplied device_ops structure containing
the hooks.
Added example support in gpio_dw driver. Updated the sample
app and tested using LPS and Device Suspend Only policies.
Change-Id: I2fe347f8d8fd1041d8318e02738990deb8c5d68e
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
API definition sys_k_event_logger_get_wait_timeout on public header
kernel_event_logger.h was passing the reference to logger struct on third
position instead of first, on sys_event_logger_get_wait_timeout call.
Resulting on error when API definition is followed.
Jira: ZEP-86
Change-Id: Ia54cd5ffe28a1fab7873bb49bd7452313ab92a02
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Test verifies that a task_sleep() function can be used during the system
initialization, then it tests that when the k_server() starts, task_sleep()
call makes another task run.
For fibers, test that fiber_sleep() called during the system
initialization puts a fiber to sleep for the provided amount of ticks,
then check that fiber_sleep() called from a fiber running on the
fully functioning microkernel puts that fiber to sleep for the proiveded
amount of ticks.
Change-Id: Iec20b61d7e802a19b1ec074d2511345eed9f2407
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Add support for task_sleep() and fiber_sleep() during the
system initialization. When CONFIG_NANO_TIMEOUTS defined,
before the k_server() starts, kernel uses nanokernel
system clock announce and task sleep functionality.
To give device drivers early sleep functionality, the system
clock has to start on SECONDARY initialization level, same
as most of the drivers.
Change-Id: Ie1d391945cd1cfb9a5dc199783c2d224eb1b0ef3
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Build with GPIO port E failed due to a missing comma.
Change-Id: Ib8fa7f4d03ed4f4c713a3a8a16ad3b37fcf6b0b7
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This driver will be used when changing pinmux functionality during
runtime.
Change-Id: I8dc7b36af13202b97183c5ee05932567e7396276
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver can be used for multiple boards based on the Quark
microcontroller family, the exceptions are Quark X1000 and Quark D1000.
Change-Id: I4c6624293515e4bbf31ac94a7f57905b4a9ef13d
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This introduces the pinmux_dev driver for the Atmel SAM3X.
This driver implements what used to be the pinmux driver API, which
applications could use to modify the function of pins during runtime.
That functionality is now protected under the CONFIG_PINMUX_DEV option,
which should only be set during the early enabling of a new board, as
there is risk of damage to the board when misused.
Change-Id: I3aa00505d2771b53c41fe687c3e5230e804756be
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Setting the direction of a GPIO pin is not the responsibility of the
pinmux "board" initialisation. This should be left for the GPIO
utilising application.
Some macros that were only used when setting the pin direction are
removed.
Change-Id: I5b63d52446a27fe539c89f0639a8dcadf5ea9f80
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver doesn't provide any API, it only initializes the pinmux
controller to appropriate values depending on the board.
The first board to use this new infrastructure is the Arduino 101 board,
because it is alphabetically the first.
To better organize code for the different SoCs and boards, a "family"
level is created in the 'drivers/pinmux' directory. The Arduino 101
board is part of the Quark MCU "family".
The PINMUX_DEV configuration (and functionality) is removed for now, it
will be added back when the pinmux_dev drivers are (re)introduced, with
clearer semantics.
Change-Id: Idf5cc3caf6be620aa50828ae8fdc535df6caf458
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This allows to start (general or limited) BR/EDR discovery. Inquiry
is active until explicitly disabled by application. This is to keep
BR/EDR discovery API similar to LE scan API.
< HCI Command: Inquiry (0x01|0x0001) plen 5
Access code: 0x9e8b33 (General Inquiry)
Length: 61.44s (0x30)
Num responses: 0
> HCI Event: Command Status (0x0f) plen 4
Inquiry (0x01|0x0001) ncmd 1
Status: Success (0x00)
> HCI Event: Inquiry Complete (0x01) plen 1
Status: Success (0x00)
Change-Id: I946fbd881e6d0460be28a9975acd564ae32896e8
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
This function is not used outside of main.c.
Change-Id: Ia8cc6c2b2193906dd77d031b73d289c6acd128b2
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Dereference buf->len after buf check for NULL.
Change-Id: I2a5de24c8c2367edfd2c35ae925c5cc5b10b03be
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
ASSERT are put each time the timer0 limit register or the timer0 count register
is modified.
Change-Id: I38684d57803de285f4e26c68b449c71396e4c750
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
Makes proper link key handling based on its type.
Change-Id: I052cc4629e531ea9ae7da95a7268778e633bdba5
Signed-off-by: Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
Add device driver for the gyroscope part of LSM9DS0 gyroscope.
Datasheet:
https://www.adafruit.com/datasheets/LSM9DS0.pdf
Change-Id: I25e0c8470c9b68c594bc4a0d2a9a13f8f41ee309
Signed-off-by: Murtaza Alexandru <alexandru.murtaza@intel.com>
If the sys log prints already have newline character, then the
syslog macros add another one. User can prevent this by defining
SYS_LOG_NO_NEWLINE before including the sys_log.h
Change-Id: I8aecd856dca8009035dd44f300846492763e57b3
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Such helper is useful to generate a complete bit mask from a given
number. For instance BIT_MASK(2) will output 0x03, or BIT_MASK(8) will
output 0xFF
Change-Id: I406de767d839b7b2d37024b7b41679edddabe551
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
When exiting from tickless idle uppon an external IRQ, the TICK timer
is set to fire at next TICK boundary. The current algorithm can lead
to a point that timer0_count register is higher than the timer0_limit
register.
In this situation the next TICK will fire after the counter has
wrapped and performed another cycle (~133 seconds).
This condition appears when the counter reaches the limit after the
Interrupt Pending flag is checked. At this point the counter is
automatically wrapped to 0, but is set just next to the limit to fire
at next TICK boundary by SW. At exit of the _timer_idle_exit function,
the timer handler is called, and sets the limit to 1 TICK. At this
point the situation is:
- limit register == 1 TICK
- count register is just below the old limit register and higher than
1 TICK
To fix this issue, at _timer_idle_exit, the limit register is always
set to 1 TICK and the count register set such as the next TICK fires
on time.
Change-Id: Ifa002809d426aa04109592e53d2b02a224f51101
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
The timer counts from 0 to programmed_limit included.
Change-Id: Ifc8585210c319f5452fafc911d4f6d72c4b91eaa
Signed-off-by: Simon Desfarges <simon.desfarges@intel.com>
Also enable GPIO and add expected output to the README
Change-Id: I2117d53dc6f90394394c6a8dd9f308a01a110634
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch fixes gpio_stm32 driver since it was merged with a few
occurrences of DEV_* error code.
Change-Id: I025e4f83d8ca07bc0fed7d3dcb9cce3b9d11c3fc
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Counter API and drivers were merged without fixing the new returning
error convention (errno.h codes). This patch fixes all occurrences of
DEV_* codes so -E* codes are used instead.
Change-Id: I85007e8565686b52121410badea547ed904460a0
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
