Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Extend the driver data structure with a field that identifies the pins
supported by the device. Document the fields and who is responsible
for maintaining them.
Update all configuration functions for specific pins to return an
error if the pin is not supported.
Update all set/get functions for specific pins to assert if the pin is
not supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several declarations provided a const pointer to mutable data. Change
all declarations that are not used to change the invert field to be
pointers to const data.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since this was converted to the setup/handle/process idiom in master
the conversion is straightforward.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update the intel_s1000_crb test app:
() Update configuration calls to use new flags.
() Separate pin configuration into setting it to input, and
setting the pin for interrupt.
() Use gpio_pin_get/set() instead of gpio_pin_read/write().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit updates the HMC5883L driver to use the new GPIO API.
Also add a note explicitly describing the active state of the DRDY
pin in the binding file.
Tested on frdm_k64f.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
Update sample overlay for missing chip select and to deconflict with
UART TXD. Add GPIO flags to configuration state. Replace callback
enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a sample overlay. Add GPIO flags to configuration state. Replace
callback enable with interrupt enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Put all the devicetree configuration data into a config structure in
flash, which removes some ultra-long identifiers from the code and
makes it more readable, and prepares for multiple instance support.
Consistently use the interrupt signal datasheet name for all objects
that are specific to that signal, including configuration structure
tags and function names.
Update the trigger idiom for setup/handle/process stages.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Converts the fxas21002 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on the hexiwear_k64 board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Update the gpio_counter sample app for the UP Squared board:
() Update configuration calls to use new flags.
() Separate pin configuration into setting it to input, and
setting the pin for interrupt.
() Use gpio_pin_set() instead of gpio_pin_write().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a board overlay for up_squared to be used with
the GPIO sample. Using the overlay is because the pins
being used are not actually LED and switch but GPIO pins
used as such.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This maps devicetree GPIO phandle arrays from the full controller pin
range to the sub-controllers required by Zephyr's limit of 32 pins per
controller device.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update driver code to use new GPIO configuration flags such as
GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There were complains about the unit-address and first reg
not matching. So update the DTS file to match.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update bluetooth hcp spi driver to new GPIO API.
Following changes have been done:
- Use new gpio api functions
- Get reset, irq and cs flags from dt defines
- Define reset pin as active low and invert set/unset logic.
Tested on disco_l475_iot1 and 96b_carbon.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Converts the fxos8700 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.
Tested on frdm_k64f and rv32m1_vega_ri5cy boards. The latter verifies
that the reset output works correctly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts the usdhc driver to the new gpio api. Updates the
device tree for the mimxrt1050_evk board to set appropriate active
high/low polarity for the power and card detect pins.
Note that the driver doesn't actually support interrupts yet. It
initializes a gpio callback for the card detect pin, but never actually
enables the gpio interrupt. This incomplete behavior is left as-is,
since the purpose of this patch is only to convert the driver to the new
gpio api, not to add new features.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The public API for GPIO flags should use unsigned values, and for
MISRA compliance the size should not be platform-dependent. Add a
typedef for generic flags.
Also add typedefs for pin indexes and devicetree flags so these can
be safely recorded from devicetree property values without risking
loss of information if more flags are added in the future.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commits adds GPIO driver for LiteX SoC builder.
Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Update sample application to use new GPIO API:
- GPIO flags defined by the devicetree
- replace gpio_pin_write with gpio_pin_set function
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
For this board all 16 pins on the SX1509B should be configured as
outputs. Six of them are active-low LEDs. Provide configuration so
those six are initialized to output high, and the remainder to output
low.
Two of the pins control the behavior of the CCS811 gas sensor. By
driving them low on boot the baseline current draw of the board is
reduced by 100 uA.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
IO extenders may provide input signals to LEDs or sensors where
leaving the signal undriven may result in increased power consumption
or misbehavior. The SX1509B powers up with all signals configured as
inputs. Provide a way to indicate which pins should be set as output,
and their initial signal level, when the device is configured.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update ALERT active level in all devicetree files. Capture GPIO flags
in static configuration. Add internal API to enable and disable
interrupt, to release the handlers when an alert occurs, and to
re-enable the signal when the handler completes. Check for alerts
received during periods when the interrupt was disabled.
Extend the example to handle both above and below range triggers and
alerts that are present on startup.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In initialization code, pairs of gpio_pin_configure/gpio_pin_write are
replaced with calls to gpio_pin_configure that configure a given pin as
output with the proper initial state.
dts file for the board is also updated with the new GPIO flags.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
