Following log subsystem rework, a warning poped-up in SYS_LOG_ERR
in spi_stm32_get_err macro.
Fix it by casting SPI_STM32_ERR_MSK on (u32_t)
Fixes#10380
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Under GNU C, sizeof(void) = 1. This commit merely makes it explicit u8.
Pointer arithmetics over void types is:
* A GNU C extension
* Not supported by Clang
* Illegal across all ISO C standards
See also: https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html
Signed-off-by: Mark Ruvald Pedersen <mped@oticon.com>
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.
Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Introduces a new mcux lpspi shim driver to be used on the imxrt soc.
This shim driver leverages heavily from the mcux dspi shim driver
because the MCUXpresso SDK provides similar APIs for the lpspi and dspi
peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
These mcux dspi driver configs are no longer used after legacy API
support was removed in commit 09dd5e9b22.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This change adds DTS definition of SPI device for nRF chips.
It also removes SPI pin configuration from Kconfig and moves it to
chip DTS.
Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
In most Nordic SoCs the SPI and TWI peripherals with the same instance
number share certain resources and cannot be used at the same time.
In nRF52810 there are only single instances of these peripherals and
they are arranged in a different way so this limitation does not apply.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Up until now, Zephyr has patched Kconfig to use the last 'default' with
a satisfied condition, instead of the first one. I'm not sure why the
patch was added (it predates Kconfiglib), but I suspect it's related to
Kconfig.defconfig files.
There are at least three problems with the patch:
1. It's inconsistent with how Kconfig works in other projects, which
might confuse newcomers.
2. Due to oversights, earlier 'range' properties are still preferred,
as well as earlier 'default' properties on choices.
In addition to being inconsistent, this makes it impossible to
override 'range' properties and choice 'default' properties if the
base definition of the symbol/choice already has 'range'/'default'
properties.
I've seen errors caused by the inconsistency, and I suspect there
are more.
3. A fork of Kconfiglib that adds the patch needs to be maintained.
Get rid of the patch and go back to standard Kconfig behavior, as
follows:
1. Include the Kconfig.defconfig files first instead of last in
Kconfig.zephyr.
2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of
last in arch/Kconfig.
3. Include arch/<arch>/soc/*/Kconfig first instead of last in
arch/<arch>/Kconfig.
4. Swap a few other 'source's to preserve behavior for some scattered
symbols with multiple definitions.
Swap 'source's in some no-op cases too, where it might match the
intent.
5. Reverse the defaults on symbol definitions that have more than one
default.
Skip defaults that are mutually exclusive, e.g. where each default
has an 'if <some board>' condition. They are already safe.
6. Remove the prefer-later-defaults patch from Kconfiglib.
Testing was done with a Python script that lists all Kconfig
symbols/choices with multiple defaults, along with a whitelist of fixed
symbols. The script also verifies that there are no "unreachable"
defaults hidden by defaults without conditions
As an additional test, zephyr/.config was generated before and after the
change for several samples and checked to be identical (after sorting).
This commit includes some default-related cleanups as well:
- Simplify some symbol definitions, e.g. where a default has 'if FOO'
when the symbol already has 'depends on FOO'.
- Remove some redundant 'default ""' for string symbols. This is the
implicit default.
Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and
BT_L2CAP_TX_MTU (caused by confusing inconsistency).
Piggyback some fixes for style nits too, e.g. unindented help texts.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Selecting the type of driver (SPI, SPIM, or SPIS) to be used for
a given SPI instance is mandatory, so the "optional" modifier is
inappropriate for related choice options in the driver's Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the HAS_HW_NRF_* symbols instead of the SOC_SERIES_NRF* ones
to filter out the driver options unavailable on particular SoCs.
Add comments explaining why the SPIM driver is not available for
nRF52832.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The following dependency loop existed:
config SPI_SLAVE
bool
(Defined at drivers/spi/Kconfig:27)
...is selected by...
config SPI_2_NRF_SPIS
bool
select SPI_SLAVE
(Defined at drivers/spi/Kconfig.nrfx:210)
...is in the choice...
choice
bool
depends on SPI_2
(Defined at drivers/spi/Kconfig.nrfx:192)
...that depends on...
config SPI_2
bool
depends on SPI_SLAVE
(Defined at
arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series)
...that again depends on SPI_SLAVE
(This might not be a problem in practice, but it'd be difficult to
detect.)
I think the underlying issue is that SPI_2_NRF_SPIS 'select's SPI_SLAVE,
while SPI_2 'depends on' it.
Fix it by having SPI_2_NRF_SPIS 'depend on' SPI_SLAVE as well. This will
require SPI_SLAVE to be explicitly enabled before SPI_2_NRF_SPIS can be
enabled.
No configuration files in Zephyr itself seem to currently enable
SPI_2_NRF_SPIS (and it defaults to n), so no tweaks should be needed
there.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The OVR condition in the Status Register requires a
particular sequence in order to be cleared. If not
done properly it stays set forever.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This is a rare but valid case when you request the controller to send
dummy bytes on your behalf (it saves memory as you don't need to provide
a valid buffer, just NULL and the numbers of dummy bytes as length).
Without it, user code can get stuck into interrupt loop.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In the current form of the code, the slave frame shifting leaves the TX
full and will shift out some unwanted bytes out on the next transaction.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In SPI slave case the transceive should return either the negative
errno code in case of error or the number of frames received.
So, now:
1. the spi_stm32_get_err() routine already checks whether
the SPI cell got an error and returns -EIO in that case.
2. the transceive() routine always returns whatever the
spi_context_wait_for_completion() has returned, which
is either:
a. -EIO in case of error
b. 0 in spi_master ok case
c. the number of frames received in spi_slave ok case
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The various macros to do checks in system call handlers all
implictly would generate a kernel oops if a check failed.
This is undesirable for a few reasons:
* System call handlers that acquire resources in the handler
have no good recourse for cleanup if a check fails.
* In some cases we may want to propagate a return value back
to the caller instead of just killing the calling thread,
even though the base API doesn't do these checks.
These macros now all return a value, if nonzero is returned
the check failed. K_OOPS() now wraps these calls to generate
a kernel oops.
At the moment, the policy for all APIs has not changed. They
still all oops upon a failed check/
The macros now use the Z_ notation for private APIs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
To avoid another thread from modifying the spi_buf_set and spi_config
structures passed to the spi_transceive() syscall, copy those to the
kernel stack before validating.
Fixes#7378.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Normally a syscall would check the current privilege level and then
decide to go to _impl_<syscall> directly or go through a
_handler_<syscall>.
__ZEPHYR_SUPERVISOR__ is a compiler optimization flag which will
make all the system calls from the driver files directly link
to the _impl_<syscall>. Thereby reducing the overhead of checking the
privileges.
In the previous implementation all the source files would be compiled
by zephyr_source() rule. This means that zephyr_* is a catchall CMake
library for source files that can be built purely with the include
paths, defines, and other compiler flags that all zephyr source
files uses. This states that adding one extra compiler flag for only
one complete directory would fail.
This limitation can be overcome by using zephyr_libray* APIs. This
creates a library for the required directories and it also supports
directory level properties.
Hence we use zephyr_library* to create a new library with
macro _ZEPHYR_SUPERVISOR_ for the optimization.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
According to data sheet of dw_spi, ser reg is used to
select spi device/slave.
one bit in ser maps to one spi device/slave, i.e..
cs 0 ---> bit 0
cs 1 ---> bit 1
cs 2 ---> bit 2
the original code has a bug. the config->slave cannot
directly be written into ser. It should be mapped to
the correct bits through 1 << config->slave.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Refactors the mcux dspi shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. With this change, we are
now getting all soc-specific information from device tree and can remove
the direct dependency on soc.h.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Spi configs like irq priority and device name should not exist if the
spi driver supports device tree. Fixes a few configs that were missing
the necessary "depends on !HAS_DTS_SPI".
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some spi instance configs were wrapped with ifdefs, while others used
depends. Make them consistent by wrapping them all with ifdefs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The mcux dspi driver was incorrectly using the macro SPI_MODE_GET() to
parse the operation for SPI_TRANSFER_LSB. The effect of this bug was
that the driver would quietly always operate in SPI_TRANSFER_MSB mode.
Coverity-CID: 185401
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Driver APIs might not implement all operations, making it possible for
a user thread to get the kernel to execute a function at 0x00000000.
Perform runtime checks in all the driver handlers, checking if they're
capable of performing the requested operation.
Fixes#6907.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This adds a translation layer to make the nrfx driver for the nRF SPIS
(SPI Slave with EasyDMA) peripheral accessible via the Zephyr's API.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Synchronous call return them on success, asynchronous one - with proper
signal - require to get this info through the status.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- removing a left over from previous SPI slave attempt
- unlock async calls on error
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Introduced with the commit 7a9c4cbd9d,
by copy-pasting from "spi_nrfx_spim.c". Shame on me...
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Similar parts of code are aligned in the two shims, so that they
can be easily compared and updated if required.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This adds a translation layer to make the nrfx driver for the nRF SPIM
(SPI Master with EasyDMA) peripheral accessible via the Zephyr's API.
The shim is provided only for nRF52840 because of a hardware anomaly
present in nRF52832. See Anomaly 58 (SPIM: An additional byte is clocked
out when RXD.MAXCNT = 1) in Errata for this chip.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The simple function that helps to integrate nrfx IRQ handlers with
the IRQ_CONNECT macro can be used in shims for various nrfx drivers,
not only the SPI one.
Similarly, the macro for getting the IRQ number from the peripheral
base address needs to be widely available. It should be even moved
to <nrfx_common.h> in some next nrfx update.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Logical or is unsufficent for setting up new tmod: it's required to
remove previous one first. Indeed, 0 as tmod is valid (tx-rx mode), but
previous tmod could be 10 or 01, so a logical or will keep the previous
tmod leading to a bogus transaction.
Fixing also a rebase issue visible when debug mode is enabled. Slave
callback is a left over from a test on spi slave.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It involves a minor change on which register is configured.
Most of the change is with threshold handling.
Handling the Kconfig based supported mode per-port.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds a translation layer to make the nrfx driver for the legacy
(i.e. without EasyDMA) nRF SPI peripheral accessible via the updated
Zephyr's API of the SPI driver.
Configuration files are already prepared for adding support for SPIM
(Master with EasyDMA) and SPIS (Slave with EasyDMA) peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Now that MCR20A supports the new API, legacy support from mcux dspi
driver can be safely removed.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adds support for the new spi api to the mcux dspi shim driver. Does not
remove support for the legacy spi api since there are still consumers of
that api, particularly the mcr20a 802.15.4 driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
As for RX only, computing the NDF will be used for EEPROM mode.
Only a way to determine EEPROM mode is missing.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Some device may need to be put up on CS high logic. The active low logic
is the default as usual, but it is now possible to request the active
high logic.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding Kconfig options to set supported modes by the controller
(master, slave or both)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Instead of using CONFIG_POLL, which is not directly related to SPI and
is a kernel option, let's have SPI_ASYNC instead. When enabled, it will
select POLL automatically.
Fixes#5839
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
tx_bufs/tx_count and rx_bufs/rx_count can be hold in another dedicated
structure, thus reducing the number of parameters to transceive. This
permits to avoid using the stack when calling transceive.
Since we saved parameters, we can expose back the struct device pointer,
to stay consistent with other device driver APIs.
Fixes#5839
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
As the content of this struct will not be modified by drivers, it's
better to pass it as constant. Also, if someday struct device can be
made contant too, this change will make spi ready for registering the
spi_config into ROM directly.
Fixes#5839
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Split QMSI relevant part into its own file. Some config where using
prompt, some not: normalizing it by removing the prompt keyword where
relevant.
Reducing the file by using if/endif when relevant.
However, it still not fully clean default: cfg and default baudrate
should disappear. There is no default configuration to apply as long
as the controller is not configured to run from any part using spi API.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The previous help text rendered as a single paragraph in the Kconfig RST
reference. The new help text renders as a bullet list and matches the
format of SYS_LOG_CRYPTO_LEVEL.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Upcoming Nordic ICs that share many of the peripherals and architecture
with the currently supported nRF5x ones are no longer part of the nRF5
family. In order to accomodate that, rename the SoC family from nrf5 to
nrf, so that it can contain all of the members of the wider Nordic
family.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Fixes#6577.
Wait for all ongoing transmits to complete before de-asserting CS.
When doing a tx then rx, wait for the previous tx to complete before
flushing the rx buffer.
Tested on the Arduino Zero against a Olimex MOD-NRF24L module.
Signed-off-by: Michael Hope <mlhx@google.com>
Switch the SoC device tree to define a single entry per SERCOM instead
of one per mode.
Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances
Switch the Arduino Zero, Adafruit Feather M0 Basic Proto, and
Trinket M0 to use the new defintion.
Add the APA102 LED that's on the Trinket as a test.
Signed-off-by: Michael Hope <mlhx@google.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix Kconfig help sections and add spacing to be consistent across all
Kconfig file. In a previous run we missed a few.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Also pull out the SERCOM pads configuration to defines. Note that the
SAM0 has a two level configuration - a signal (like TX) is mapped to a
pad, and then a pad is mapped to a function on a pin.
Signed-off-by: Michael Hope <mlhx@google.com>
This patches fixes a few bugs with the SAM0 driver:
- txrx was trasnmitting too many bytes
- adds support for NULL buffers to the fast paths
- fixes a NULL dereference on the rx buffer slow path
The tests under tests/driver/spi/spi_loopback now pass.
Signed-off-by: Michael Hope <mlhx@google.com>
Current buffers might be configured to skip data, thus only len will be
set, buf will be NULL. Buffer should be used if only len is > 0 and
buffer is valid as well.
tx/rx are "on" if len is > 0
tx/rx buf should be touched if only len is > 0 _and_ buf != NULL.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Use "select USE_STM32_LL_SPI" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The SAM0 series has up to 6 SPI ports. Add Kconfig options to match.
Similar to the 9033fb2f01, this patch
only defines the fields that are currently used and skips ones like
GPIO and IRQ priority that aren't.
Signed-off-by: Michael Hope <mlhx@google.com>
SPI_MODE_GET() returns a bitfield. It is thus wrong to test if a bit is
set using the equality operator. The bit-wise AND operator must be used
instead.
This can be tested by setting the SPI in mode 3 (CPOL + CPHA). Currently
both tests will fail and the result is a SPI configured in mode 0. This
was confirmed using an oscilloscope. Applying the patch fixes the
polarity.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
spi_transceive_async() omitted as we don't support k_poll objects
in user mode (yet).
The checking for spi_transceive() is fairly complex as we have to
validate the config struct passed in along with device instances
contained within it.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
When the header file is located in the same directory as the source
file it is better to use a relative quote-include, e.g.
than a system include like
Avoiding the use of system includes in these cases is beneficial
because;
* The source code will be easier to build because there will be fewer
system include paths.
* It is easier for a user to determine where a quote-include header
file is located than where a system include is located.
* You are less likely to encounter aliasing issues if the list of
system include paths is minimized.
Authors:
Anas Nashif
Sebastian Bøe
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The current prescaler calculation incorrectly fails to configure the
desired frequency when it is possible to match it exactly. Fix this.
Without this patch, if the user requests frequency N Hz, and there is
a SPI prescaler that can match this frequency exactly, the actual
frequency chosen by spi_stm32_configure() will be N/2 Hz.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
If CS (Chip Select, known also as Slave Select...) is managed externaly
of the stm32_ll SPI controller, just config NSS line management
accordingly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removing internal boolean in order to use the proper error code hold in
spi_context which was relevantly added in commit 6c717095b8.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Previous approach allowed only single word update for single
function call. Updating context in ISR was inefficient for
controllers supporting automatic multiple data packets transaction.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
Added function helps setting the longest possible rx and tx buffers for
single SPI transfer. Each of these buffers is a continuous memory
region. It is useful for example when peripheral supports easyDMA.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
The output state of the CS GPIO must be configured with a pull-up while
setting the GPIO as output. Otherwise the GPIO will be forced low,
before being set high by the call to spim_nrf52_csn(). This results in a
glitch of 1us on the CS line, which may confuse some ICs in the worst
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
When setting the SPIM speed to 8 MHz, the driver will return an error
due to a missing "break" causing the execution flow to reach the default
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
The transmit and receive procedure used in the STM32 SPI driver is not
correct.
On STM32F4, this is causing OVR errors (per the logged error mask) and
transmission of undesired 0x00 bytes (verified with a logic analyzer).
The root cause is that the receive register is not read (via DR, when
RXNE is set) each time the transmit register is written (also via DR,
when TXE is set). This clearly causes OVR errors when there is no
FIFO, as the receive register needs to be read each time a frame is
transceived, or the IP block has no way of knowing that the
overwritten data were not important.
Adapt the I/O procedure so that every DR write is matched by a DR
read, blocking until the relevant flags are set if necessary.
This behavior is suboptimal for targets such as STM32L4, where there
is a SPI FIFO. However, SPI I/O is broken on those targets, and this
patch fixes them as well. Further optimizations for targets with FIFOs
is left to future work.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
With some other issues in polled mode now resolved, add error handling
and report a valid error status when releasing the context.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Byte access is always naturally aligned; there's no need to use
UNALIGNED_GET or UNALIGNED_PUT. Those would only be needed when
supporting 16-bit data frames.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The current implementation unconditionally enables the SPI (sets
SPI_CR1_SPE) in transceive(), but disables it only in master mode.
The peripheral should only be enabled while the user has specifically
requested I/O. Fix this by always disabling the peripheral when I/O is
complete.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Polled and IRQ-driven SPI I/O share code for cleanup and completion,
which can now be factored into its own routine.
This keeps a single point of truth for common paths, which will allow
a subsequent bug fix to happen in one place, and help avoid future
regressions.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In polled mode, the STM32 SPI driver is signaling completion when
there are no waiters:
- the only spi_context_wait_for_completion() caller in this driver is
in the IRQ-driven portion of transceive() itself, which isn't
compiled in polled mode.
- the "asynchronous completion + polled I/O" combination is not
supported by the driver, so there are no other threads polling on
this I/O we need to signal completion to.
What should be happening instead of signaling completion is releasing
the chip select pin, which polled I/O currently doesn't do.
Fix these issues.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The LL_SPI_NSS_* macros used in spi_stm32_configure() when
hardware-based NSS management is requested are incorrect; fix them.
In master mode, this seems like a copy/paste error. The slave mode
case is likely due to following incorrect documentation in the ST LL
headers.
Note that in my testing on STM32F4, NSS appears to be open drain when
managed by hardware, making that configuration harder to test (and
probably less useful).
Details for the curious:
The ST LL headers (for example stm32f4xx_ll_spi.h) claim
LL_SPI_NSS_HARD_INPUT is to be used only in master mode, and
LL_SPI_NSS_HARD_OUTPUT is to be used in slave mode.
The opposite is true: when NSS is not handled by software, the SPI
peripheral is responsible for driving NSS as an output, and the
slave peripheral is responsible for reading it as an input.
This is an error in the LL header files; the reference manuals and
the other LL code make this clear.
- The ST reference manuals specify that LL_SPI_HARD_OUTPUT (which
corresponds to SSM unset, SSOE set) is a master-only
configuration. For example, STM32 RM0368 says:
"NSS output enabled (SSM = 0, SSOE = 1)
This configuration is used only when the device operates in
master mode."
- LL_SPI_HARD_INPUT (SSM unset, SSOE unset) is either a master or
a slave configuration; in the slave case (which is what we're
interested in here), it corresponds to the "usual" NSS
input. RM0368, again:
"NSS output disabled (SSM = 0, SSOE = 0)
This configuration allows multimaster capability for devices
operating in master mode. For devices set as slave, the NSS
pin acts as a classical NSS input: the slave is selected when
NSS is low and deselected when NSS high."
The LL_SPI_StructInit() implementations similarly combine
LL_SPI_MODE_SLAVE with LL_SPI_NSS_HARD_INPUT.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Now that struct spi_context supports passing errors from
interrupt-driven I/O handlers to waiting threads, we can enable error
interrupts and propagate errors to spi_transceive() callers.
To make it easier for users to debug SPI-related issues, log any error
bits set in SR when failures occur.
A subsequent patch will add error checking to polled mode as well, but
other cleanups and fixes will go in first to make this easier.
Note that this breaks the spi_loopback test on some targets, but it's
not a regression, as it wasn't working properly anyway. Subsequent
patches the bugs that this error checking has exposed.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The SPI API allows waiters to block until SPI I/O has completed. The
asynchronous subset of the API allows waiters to learn a status value
for the result of the I/O. However, the synchronous API does not allow
this.
Due to this limitation, synchronous API users cannot learn when
interrupt-driven I/O fails, which precludes proper error handling.
Resolve this limitation by adding a sync_status field to struct
spi_context, and using it to return operation results to the waiter.
Since there is only one status field, reduce the maximum number of
supported waiters from UINT_MAX to 1. This is not a problem for
current users, which all wait with the entire context locked.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Void pointer arithmetic is undefined behavior (UB).
It's OK for struct spi_buf to contain a void *, because those values
are only ever stored, read, and compared. However, pointer arithmetic
is done on the tx_buf and rx_buf fields in struct spi_context, so
those need to be u8_t * to avoid UB.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Fix clock polarity and phase configuration by using correct
bit shifted configuration values.
Also, fixed SPIM1 config struct initialization that referred
to wrong SPI0 value.
Signed-off-by: Nathan Loretan <nathan.loretan@nordicsemi.no>
Change the common "init with 0" + "give" idiom to "init with 1". This
won't change the behavior or performance, but should decrease the size
ever so slightly.
This change has been performed mechanically with the following
Coccinelle script:
@@
expression SEM;
expression LIMIT;
expression TIMEOUT;
@@
- k_sem_init(SEM, 0, LIMIT);
- k_sem_give(SEM);
+ k_sem_init(SEM, 1, LIMIT);
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
It is incorrect to call spi_context_release() on a
spi_dw_data object's ctx field before data->ctx->config is first
set in spi_dw_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_dw_init(),
calling spi_context_release() reads the uninitialized memory in
spi->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
spi->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
It is incorrect to call spi_context_release() on an STM32
spi_stm32_data object's ctx field before data->ctx->config is first
set in spi_stm32_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_stm32_init(),
calling spi_context_release() reads the uninitialized memory in
data->ctx->config->operation.
Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.
Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
data->ctx->config->operation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Upcoming memory protection features will be placing some additional
constraints on kernel objects:
- They need to reside in memory owned by the kernel and not the
application
- Certain kernel object validation schemes will require some run-time
initialization of all kernel objects before they can be used.
Per Ben these initializer macros were never intended to be public. It is
not forbidden to use them, but doing so requires care: the memory being
initialized must reside in kernel space, and extra runtime
initialization steps may need to be peformed before they are fully
usable as kernel objects. In particular, kernel subsystems or drivers
whose objects are already in kernel memory may still need to use these
macros if they define kernel objects as members of a larger data
structure.
It is intended that application developers instead use the
K_<object>_DEFINE macros, which will automatically put the object in the
right memory and add them to a section which can be iterated over at
boot to complete initiailization.
There was no K_WORK_DEFINE() macro for creating struct k_work objects,
this is now added.
k_poll_event and k_poll_signal are intended to be instatiated from
application memory and have not been changed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add a SPI master and slave driver for the L4, F4 and F3 STM32
SoCs families.
Change-Id: I1faf5c97f992c91eba852fd126e7d3b83158993d
Origin: Original
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Lee Jones <lee.jones@linaro.org>
as config SPI_CS_GPIO was selecting GPIO instead it
should just depend on it. This patch is a fix for
ZEP-2071 jira.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Instead of NULL terminated buffer arrays, let's add a parameter for each
that tells the number of spi_buf in it.
It adds a little bit more complexity in driver's side (spi_context.h)
but not on user side (bufer one has to take care of providing the NULL
pointer at the end of the array, now he requires to give the count).
This will saves a significant amount of bytes in more complex setup than
the current dumb spi driver sample.
Fix and Use size_t everywhere (spi_context.h was using u32_t).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Documentation doesn't specify if this function may return 0, so add an
inexpensive check to account for this.
Jira: ZEP-2135
CID: 160954
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
If CS is controlled over GPIO, it will be possible to keep the slave up
and running (though no transaction will be going on) using this
configuration bit.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SPI_HOLD_ON_CS can be used to ask the SPI device to keep CS on, after
the transaction. And this undefinitely, until another config is used.
This will inhibate the gpio cs delay, if any. This might be useful when
doing consecutive calls on one slave without releasing the CS.
SPI_LOCK_ON is to be used with caution as it will keep the SPI device
locked for the current config being used after each transaction. This
can be necessary if one needs to do consecutive calls on a slave without
any olher caller to interfere.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All is done through the generic spi_context driver's API as it will be
generic to all SPI drivers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a struct k_poll_signal parameter to driver's API unique
exposed function.
If not NULL, the call will be handled as asynchronous and will
return right after the transaction has started, on the contrary
of current logic where is waits for the transaction to finish
(= synchronous).
In order to save stack, let's move the device pointer to struct
spi_config. So the call is still at a maximum of 4 parameters.
Adapting spi_dw.c and spi driver sample to the change so it still
builts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
All SPI drivers have this same way to handle synchronous call, thus
let's generalize it in struct spi_context, with a relevant API and apply
the change into SPI DW driver.
spi_context API will prove to be useful once asynchronous call will be
handled as well, through the same completion functions used now only for
synchronous call. It will be transparent for the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Let's improve common SPI driver context by adding a lock and generic
function to get/release it.
It's statically initialized to save a bit of ROM.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Introducing as well a generic driver helper for CS gpio control and
buffer management.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such API improves many aspects of the former API by reducing the number
of function, allowing more buffer flexibility etc... This leads in
better memory usag and performance as well.
However, as this will take sometime to get into use, the former API is
still present and is the one enabled by default.
Jira: ZEP-852
Jira: ZEP-287
Jira: ZEP-1725
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
One liners if/for/while statements still need {}
(and line break are cheap for clarity).
Aligning parameters properly.
Also, removing __func__ usage from SYS_LOG_* as these macros already put
it internally.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Fix misspellings in Kconfig help text and made spelling of
RX and TX consistent (from reviewer comments)
Change-Id: Ie9d4c3863cd210e7a17b50a85a7e64156b6bf3d7
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Even one liner if () should have get { ... }
Change-Id: I7f9d8d74398286e97549bed050e29d4d175e1b02
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* SPIMx support for nrf52 spi interface with easy dma
Change-Id: I3221b14867924b91a9d809faf689090574f5dc1c
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
In prep for supporting the older KL2x SoCs that use a different SPI
block, rename the current SPI driver to DSPI to match what the MCUX HAL
defines it as.
Change-Id: I9097580df5fca649ab6fd9a38212fced0b1ea6ed
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.
Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
Enable gpio driver automatically when an app or upper
level driver needs it as chip select for spi.
Change-Id: I2bed134939426e2c84f313393d638a878c84fbfc
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Now that we have a more generic mcux spi driver that can be used across
multiple Kinetis SoCs, remove the specific k64 spi driver.
Jira: ZEP-1374
Change-Id: Ifc324374f305837f5e3d2cfd7ad30d3608865b5b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a shim layer around the mcux dspi driver to adapt it to the Zephyr
spi interface. Unlike the existing k64 spi driver, this driver can be
used for other Kinetis SoCs that contain the dspi module.
Jira: ZEP-1374
Change-Id: I9417c1513565dfcc47ccda098492f60e840f4f84
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds default configurations for baud rate, transfer word size, clock
polarity and phase. These default configurations can be shared across
multiple spi drivers.
Change-Id: I221b402c075003014991b38f6342a89e55c3bec9
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When CONFIG_SYS_POWER_DEEP_SLEEP is enabled, spi_qmsi_ss will
keep entering deep sleep because it needs to wait until the
current transfer completes, which blocks the current thread.
The system keeps entering deep sleep again and again and the
transfer will never complete.
Add device_busy_set() to spi_qmsi_ss driver to indicate that
the device is busy and block the system from entering deep
sleep during transaction.
Jira: ZEP-1488
Change-Id: I5a4456933249def93eaa529b30b99d730af74482
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
Enable arc to access the spi controller on I/O fabric.
There are two spi controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the spi controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add spi_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1190
Change-Id: I40a5d423d4b7986a897834d1a3831938005eda6f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Device sync APIs are actually wrappers for semaphores.
Let's replace them with semaphores.
Jira: ZEP-1411
Change-Id: I02c7cba21d21ff9288e452121e3b7ebb7d251bb4
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This patch fixes RX overflow error in the k64 SPI driver.
Jira: ZEP-1351
Jira: ZEP-1352
Several circumstances lead to an RX overflow:
The RFOF_RE (RX fifo overflow) must not be set as default.
The flag is only set when rx_buf is available. Also it must
be checked inside spi_k64_isr whether RFOF_RE has been set or not.
If the rx_buf is not available and the incoming data
should be ignored, then MCR_ROOE need to be set.
Since it is not possible to change the MCR register
during the transfer, RX fifo must be emptied
if rx_buf_len < tx_buf_len.
The driver also uses spi_data.xfer_len now,
the variable was already defined. Now, transfers are also
possible if tx_buf_len < rx_buf_len (e.g. read slave device register).
spi_k64_push_data has been adjusted accordingly.
The patch simplifies the handling of interrupts.
The interrupts are also switched off in the event of an error.
The patch also fixes a few coding style issues.
Change-Id: I6ce81f595bb1edbbf2253b6595602896ca652762
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Remove non existent CONFIG_SPI_DEBUG and replace cnt
with DBG_COUNTER_* macros.
Jira: ZEP-1351
Jira: ZEP-1352
Change-Id: I1fba7aaead1ad0b36297b069e5a83e25b7991588
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Clear RX and TX FIFO before starting transfer fixing RX overflow issue
on FRDM K64F board.
Change-Id: I9345a0058a6c7958a6ecf3dc23b99fe7bff18796
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Logging in spi_k64 driver is based on printf-like functions and does
not make sense with syslog which adds additional information like
function name and new line already.
Change-Id: I84a81ebf5c3cc94b311a2e41bdb5f014432d2b09
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Use configured init priority same way it is used for other SPI
drivers. Default priority initializes SPI before console hiding
possible errors and debug messages.
Change-Id: Iddc9c783290d852caa8a9385de4ab114f8f7a2e3
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Fixes following error:
...
drivers/spi/spi_k64.c:717:86: error: 'cnt' undeclared (first use in
this function)
...
Change-Id: If49fa4838265cd39a6f72eb265388ff7faae9a9e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add function return value check. This was caught by
Coverity.
Coverity-CID: 157124
Change-Id: I93b23325d657dc787300908b9117b6976617fdba
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This commit updates the spi_qmsi_ss driver by adding save/restore
context functionality for power management, using the corresponsing
QMSI APIs.
Jira: ZEP-664
Change-Id: I9e62729f91c4808eb557d8a64c0f10955f5456f3
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit updates the spi_qmsi driver by removing the temporary Zephyr
save/restore context implementation and using the new QMSI APIs.
Jira: ZEP-997
Change-Id: I70c6838025253d13d6ebe690ec90dfc1b18bfcea
Signed-off-by: JuanX Solano Menacho <juanx.solano.menacho@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Change e4b89571aa renamed the variable
to an undeclared one, without breaking verify but daly breaks.
A local variable of type spi_intel_data was missing on this
function.
Jira: ZEP-1095
Change-Id: Ie410933c2472378d4a6f24d6ca932ac203e3b08c
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Mutable driver state relocated from config_info to driver_info. This
driver supports PCI enumeration. We drop code that attempts to update
irq_num based on PCI enumeration because the interrupt found by PCI
enumeration must always be the same as the statically configured IRQ
number.
Change-Id: I97198ae9603505606a872b07824d6c61688f0ced
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I1ca9e999840a6ad81dc369b56b1da554f3c1cb49
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I71bcfa48b31934bc683a344d40bb03f5247bbbec
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Make pointers to struct config_info const in prepration for a const
config_info.
Change-Id: I28789a7f1f26e4a0d499f5a89a567ae8c61eae51
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@gmail.com>
Update the power sample and drivers with the new device driver power
management API using the existing logic
Jira: ZEP-954
Change-Id: Idd94232e458767635973e94e9fc673c01612c1e2
Signed-off-by: Amir Kaplan <amir.kaplan@intel.com>
This patch implements suspend/resume routines which
preserve SPI master 0 and 1 context in SYS_PM_DEEP_SLEEP.
The following parameters are suspended/resumed:
- All non-sticky RW registers for the SPI device which
are not related to a transfer.
- The SPI MASK registers (interrupt routing register).
The suspend/resume functionality is implemented in
the QMSI shim layer as a fast and temporary solution,
it will be removed and migrated to QMSI later.
Change-Id: Ib60317ca41013a3e794820e9c3ef34f35d108209
Signed-off-by: Dragan Cvetic <dragan.cvetic@intel.com>
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Also, SPI 0 isn't specific to Intel, make it a generic message. This patch
only fixes the cosmetics w/o changing undering Kconfig option names.
Change-Id: Ia58f9537c594004a1b5fb8b4af21d7e8b729efb7
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Drivers that implement power management should use the preferred
device_pm_ops method instead.
Change-Id: I337722b1e06afe8508b5c84c00c3542571232e07
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The suspend and resume hooks in the spi_driver_api struct are relics
from before the current power management infrastructure was in place.
The correct way to implement this now is through the device_pm_ops
struct, by way of the DEFINE_DEVICE_PM_OPS and DEVICE_AND_API_INIT_PM
macros, which make the hooks available through a generic mechanism for
all devices, rather than using per-type APIs.
Since the existing spi_suspend() and spi_resume() functions don't check
if the driver_api hooks are NULL, there's now a place holder function
to prevent breaking functionality until the hooks are removed.
Change-Id: I48287c58e9a8649d3e1be7547e3d0d293c84327a
Signed-off-by: Iván Briano <ivan.briano@intel.com>
The suspend and resume hooks in the spi_driver_api struct are relics
from before the current power management infrastructure was in place.
The correct way to implement this now is through the device_pm_ops
struct, by way of the DEFINE_DEVICE_PM_OPS and DEVICE_AND_API_INIT_PM
macros, which make the hooks available through a generic mechanism for
all devices, rather than using per-type APIs.
Since the existing spi_suspend() and spi_resume() functions don't check
if the driver_api hooks are NULL, there's now a place holder function
to prevent breaking functionality until the hooks are removed.
Change-Id: I6a3e3db370860ad46f428d287943b1ca58a80ae1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
QMSI 1.1 Beta is available on Github:
https://github.com/01org/qmsi/releases/tag/v1.1.0-beta
Update the QMSI drop we maintain in Zephyr and
keep the modification to qm_soc_regs.h introduced on commit
6b88a6b945 "ext qmsi: Add USB base and interrupt defines" since
that patch hasn't made into the QMSI 1.1-Beta release in time.
Also, fix the build where needed:
- add hard dependency from qm_i2c to qm_dma
- fix spi_qmsi_ss.c due to new parameter naming
- fix adc_qmsi.c and adc_qmsi_ss.c due to a new parameter
Change-Id: I01388c787f5ee6ee97fece2e42b24a717522207f
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
SPI drivers for K64 is now using system log.
Change-Id: Ifd0d321e2ff84c581261b7cb3a7a4485afbd67f6
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
JIRA: ZEP-311
This will allow the driver to be fiber and task safe
Jira: ZEP-410
Change-Id: I61d3d9e4128bae781f1c86c07af79eb6e43ebeda
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This will allow the driver to be fiber and task safe
Change-Id: I916d4ad67ab6f51f41f3d1136c105e4d1445de48
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
The TX fifo threshold is pretty arbitrary.
Set this too big and too many interrupts will occur
for no good reason. Set it too small, and latency
in the SPI transactions is introduced. User's will probably
have to tune this per their application and SPI frequency, etc.
I think setting this to 50% is a good guess for now.
Change-Id: Ib325d40bc7ee10473d99443b3b3cd00fd6e4b95f
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add SPI sub-driver for sensor system.
Use SPI irq number definitions already in Zephyr header file.
Origin: Original
Change-Id: I215db3acc535093dd75c0817cbe5af77e6e76e16
Signed-off-by: Baohong Liu baohong.liu@intel.com
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
I've found many problems with the SPI driver and this repairs many of them.
The baud rate divisor was being derived from the CPU clock. But, some
targets may have a seperate clock attached to SPI. If the soc.h file
defines the symbol SPI_DW_SPI_CLOCK, it will use this instead
of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for the baud rate calculation.
completed() had a mistake where it would terminate the SPI transaction
too early, well before the tx data has cleared the FIFO. I found I couldn't
drive an OLED display correctly because completed() was wrong.
The repair is to now consider a new flag called spi->last_tx,
which will be set after the TX interrupt occurs with nothing to send any
longer. There is also a while loop added to SPIN until BUSY drops.
Another improvement is that push_data will NOT consider RX fifo size
if there is no RX going on. The calculation here when RX is going on
could go negative. I've added a check for that and prevent TX handling
if RX buffer is full. I think that is the intention -- to deal with RX first
if its fifos are more full.
In spi_dw_transceive, if we are only doing spi_write w/o reading,
don't enable RX interrupts at all. The OLED I'm working with failed
to have a pull-up on MISO SPI signal. As a result, a huge number of
garbage RX events arrive, and the interrupt handler finds there is
no rx buffer, so it tosses the data. But this is a waist of realtime.
It seems WRONG to enable RX interrupts if its something your not using,
so software can GATE these spurious events in this way.
With these changes, SPI can be used much more reliably, with FIFOs
that are deeper, and SPI devices that only require TX.
Change-Id: I0fe0745f2381c61c8a19ce086496b422a32a30a5
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
When using the Synopsys DesignWare Synchronous Serial Interface (SSI),
the FIFO depth can vary from 2-256, depending upon how this module is built.
For quark_se_ss, it was using a depth of 8. For EM Starterkit, it will be
32. Adding this now as a configurable option. A larger FIFO really helps
reduce SPI interrupts.
Change-Id: Id2bc8470bfc08ab447d38b89c7904cff010c63bd
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Just as rxftlr can be read, a macro is needed so that txftlr can be read.
Symmetry.
Change-Id: Id987f700d89268feca60850f4fdf512f990f3ab6
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
A recent submission caused a build error for DW
CONFIG_SPI_DW_INTERRUPT_SINGLE_LINE because the symbols
CONFIG_SPI_<0,1>_IRQ went missing from Kconfig.
I think these should probably NOT be configurable, because
on an SOC, interrupt lines are hard. So I'm changing
the names back to SPI_DW_PORT_<0,1>_IRQ, with there
definitions originatig in the soc.h file.
Also, on DesignWare ARC EM Starterkit, the SPI interface
has 6 slave selects, but IP itself can handle up to 16.
Why does this start from 1 and not 0? Argh!
DBG_COUNTER_RESULT() should expand to 0 when not used.
Also, don't check version from DesignWare IP because
it can be different for each target.
spi_dw_isr() requires a cast when converting arg to dev.
Change-Id: I83d55e0405583e7cafab80b09cbef44e0f96fcb8
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Use the same Kconfig infrastructure and options for all SPI drivers.
Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the values are SoC specific and come from the SoC definition,
not need to define them in Kconfig.
Jira: ZEP-294
Change-Id: I962ce36b7e2361ea77ae4178bb7c86c19a241c4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the values are SoC specific and come from the SoC definition,
not need to define them in Kconfig.
Jira: ZEP-294
Change-Id: I7688ca523915e3fa8a1d28dea7a1d84a66b39d56
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Do not have priority per IP, use one config instead.
Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Note that the failure case can only be reached when compiling
for ARC side of Quark SE. Otherwise, the code is never compiled
which reduces code size for other platforms.
Change-Id: Ic76890cbaf22da5c3563e056cba9b39615d3da0c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the assignment of driver_api to just before
the init function returns. This is in preparation to
make device_get_binding() return NULL if driver
initialization fails.
Change-Id: I69590c463b84877d250c63d4460b7e254b79c8b3
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The SPI API states:
"max_sys_freq is the maximum frequency supported by the slave it
will deal with"
However, currently, for DW the max_sys_freq is a divider which confuses
the user.
This patch adds a small hack to allow users to use both dividers and
frequencies when configuring the bus. The only trade-off is one has to
use dividers for bus frequencies smaller than 65536Hz. However, since
most devices nowadays can run at clock frequencies more than 100kHz,
this is a good compromise.
Change-Id: I44386cc8ad501b08eeaf71bc7588661ff36e108b
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.
Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Makes K64 spi driver submenu available only if K64 soc is
selected.
Change-Id: I0ada8863a592f056dbe48e78d9374f2348dcac14
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
() Moves config options for each controllers into their own
Kconfig files. This keeps upper level Kconfig from getting
too big.
() Options for each controller are moved under their own
submenus.
Origin: refactored from existing file
Change-Id: I813694f26126b43523b08ebdb0a5383edd241cda
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch replaces all occurences of the macro DEV_NOT_CONFIG by
-EPERM at the driver level. This patch is part of the effort to
transition from DEV_* codes to errno.h codes.
Change-Id: I3054c8aa76319a58a2eec089b8a72bf301c85391
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_USED by -EBUSY
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I21eb3ffe9bdfde98593dcf63c50a8bdcd376e49e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_CONF by
-EINVAL at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_INVALID_OP by
-ENOTSUP at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I46aec3c65963018c479b01602e4a3eec8650eaff
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_FAIL by -EIO
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I0594ab5dbe667e074c250129e7c13ce512ac940f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.
This patch is part of the effort to transition from DEV_* codes to
errno.h codes.
Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
According to documentation, there must be at least one cycle delay
between two consecutive writes of the DR register. Apparently, this is
true for reading too, though undocumented.
The read_dr() inline function is called as follows:
*(spi->rx_buf) = read_dr(info->regs);
which the compiler, with full optimizations on, turns it into:
ld_s r2,[r1,24] <- the spi->rx_buf
sr 0x80000000,[r4] <- this is the strobe bit write !!!
lr r4,[r4] <- this is the FIFO read!!!
stb r4,[r2] <- store the result
Unfortunately, the read from the FIFO is always 0 since the FIFO data is
not yet available.
During my investigations, I found that the following code works:
sys_out32(1 << 31, info->regs + 0xd);
*(spi->rx_buf) = sys_in32(info->regs + 0xd);
This does, basically, the same thing. But the compiler inserts an
instruction in between the write/read:
sr 0x80000000,[r4] <- write of the strobe bit!!!
ld_s r2,[r1,24] <- the pointer goes to r2
lr r4,[r4] <- read from FIFO!!!
stb r4,[r2] <- store the result
A single clock cycle between writing the register and reading seems
to be enough for the data to become available for reading.
This patch adds a nop in the read_dr() inline function.
Change-Id: I0c216d5738d5771835b1052e2e83363e8e3abf0c
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@intel.com>
Support for Freescale/NXP K64 SPI modules, limited to:
- Master mode
- A single active set of clock and transfer attributes (CTAR0), which
includes non-adjustable delay parameters
- Tx FIFO fill and Rx FIFO drain interrupt handling
- Standard, continuous select and continuous SCK SPI transfer formats
Also, divide-by-zero code generation in this driver is prevented.
The 'volatile' attribute is added to some of the variables in the baud
rate and delay calculation functions of the K64 SPI driver in order to
prevent bad code generation by gcc toolchains for ARM seen when an
optimization setting above -O0 is used.
Specifically, a register is loaded with the constant 0 and is used as
the divisor in a following divide instruction, resulting in a
divide-by-zero exception.
This issue has been seen with gcc versions 4.8.1 (the VxWorks toolchain)
and 5.2.0 (the Zephyr SDK toolchain).
Change-Id: Ib5b2b748aad8fdfd5e8d40544e6e1abef3713abe
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
There's no reason to require callers to cast their data to uint8_t *
when the data might e.g. originate in a packed struct or some other
data type. Instead, be nice to callers and let them use any pointer
they want. Additionally, declare the TX buffer as a const pointer so
unnecessary typecasts aren't needed for that either (if the data
originates in a const location).
Change-Id: I1482ca4e350b5a7fbda6871ed9f54f255af3aa9e
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This log is in spi_intel_configure, not in spi_intel_transceive.
Change-Id: I5d62dd63d0cfa2c86f2dd5f9a6d367b7ad47b355
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The buffers aren't guaranteed to be aligned so that they're always
aligned for uint16_t or uint32_t data. Use the available unaligned
access macros to read/write the data.
Change-Id: Ie87c108aa370af196b9c759b59ed7fb9d1ed6183
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
When configured at a frequency of 2MHz, a transaction writing
3 bytes and reading 1 byte fails silently (last byte cannot be
read back from the device). Enabling CONFIG_SPI_DEBUG fixes the
issue.
Scope traces show that the transaction (from /CS assert to /CS
deassert) takes 14us and there is activity on the MOSI line
after /CS is deasserted. A transaction writing 2 bytes and reading
3 bytes take 22us.
The issue is due to the fact that completed() deasserts /CS after
the driver has put 3 bytes in the TXFIFO and taken 1 byte from RXFIFO.
Just because the last byte made it to the TXFIFO, it doesn't mean that
it was put on the MOSI line.
The fix:
For a transaction sending T bytes and expecting R bytes, let N=max(T,R).
Send exactly N bytes and wait for exactly N bytes (or an error). This
way, we are sure that all the bytes were sent to the target device.
Also:
Stop calling pull_data() after every byte sent, it might take a while
for a byte to show up in RXFIFO.
If RFS bit is set, stop sending bytes (will be really useful with a
bigger RFT).
Flushing RXFIFO in spi_intel_transceive() is not needed anymore.
Change-Id: Ifb06a12b03e3e20d6ace4d9f3a20fc11ec3bb010
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
Remove semicolon that triggers a build failure
when CONFIG_SPI_INTEL_PORT_1=y
Change-Id: Iea49d44059377cf9eb0b5b5e14b625cb316a65bb
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/spi/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig.
It also moves the interrupt priority definition from the driver's
Kconfig to the platform's Kconfig since it is a platform-specific
configuration.
Change-Id: Ic992749b3210ed8a2e454edece41ceca5edbaf2e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Though it's an ARC core, Quark SE SS does not follow the same registers
mapping as the official DesignWare document. Some parts are common, some
not.
Instead of bloating spi_dw.c with a lot of #ifdef or rewriting a whole
new driver though the logic is 99% the same, it's then better to:
- centralize common macros and definitions into spi_dw.h
- have a specific spi_dw_quark_se_ss_reg.h for register map, clock
gating and register helpers dedicated to Quark SE SS.
- have a spi_dw_regs.h for the common case, i.e. not Quark SE SS.
GPIO CS emulation and interrupt masking ends up then in spi_dw.h.
Clock gating is specific thus found in respective *_regs.h header.
Adding proper interrupt masks to quark_se_ss soc.h file as well.
One of the main difference is also the interrupt management: through one
line or multiple lines (one for each interrupt: rx, tx and error). On
Quark SE Sensor Sub-System it has been set to use multiple lines, thus
introducing relevant Kconfig options and managing those when configuring
the IRQs.
Quark SE SS SPI controller is also working on a lower level, i.e. it
requires a tiny bit more logic from the driver. Main example is the data
register which needs to be told what is happening from the driver.
Taking the opportunity to fix minor logic issues:
- ICR register should be cleared by reading, only on error in the ISR
handler, but it does not harm doing it anyway and because Quark SE SS
requires to clear up interrupt as soon as they have been handled,
introducing a clear_interrupts() function called at the and of the ISR
handler.
- TXFTLR should be set after each spi_transceive() since last pull_data
might set it to 0.
- Enable the clock (i.e. open the clock gate) at initialization.
- No need to mask interrupts at spi_configure() since these are already
masked at initialization and at the end of a transaction.
- Let's use BIT() macro when relevant.
Change-Id: I24344aaf8bff3390383a84436f516951c1a2d2a4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch fixes the QMSI SPI shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in spi_qmsi_init() because the macro QM_SPI_MST_1
and the function qm_spi_master_1_isr are not defined in QMSI headers
from Quark D2000.
Since this drivers is now properly working on Quark D2000, this patch
also sets the QMSI driver default options in arch/x86/soc/quark_d2000/
Kconfig.
Change-Id: Ic6e2f7f5a2c3f350ddf360b23ffab6b812948572
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Currently we have devices named "dw_spi_0" and "intel_spi_0" etc, which makes
it difficult for an application to look up. Or worse, forcing a 3rd party IP
to hardcode in support for only one specific IP block.
Change-Id: Ie485e2350b171b66b22cd7ab39e0fcd196f38af8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Looking at all structs as to where we can pack them a little better, and
calling out the padding/stride at the end for future expansion.
Change-Id: I4a651092e950dd3d915af9fa0ee0d7d59803e58f
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Available only when CONFIG_SPI_DEBUG is set:
- Print out all exported functions with relevant infos
- Remove superfluous messages
- Make counter in push/pull not being instanciated when not debugging
Change-Id: Iaa96a897008d360a14bc83da54152c264f42c60d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It's a bug that did not happen, but is a valid one:
if there is an error, we should not care at all about current stage of
transmission, thus it will stop right away.
Change-Id: Iec2b519d8118233f570ded18d6c6eb4084371e5b
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There are situations when the transfer starts before we have the time to
enable the CS line, so to be sure, we active it before even attempting
to start the transfer.
This fixes an CC2520 driver initialization issue using the QMSI SPI driver.
Change-Id: Ib9b324b77260ac537f714376c8056b1543e7e3b3
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Because of the necessity of using a GPIO pin as Chip Select, we need to
set the initialization priority of the SPI driver so it occurs after the
GPIO driver.
Change-Id: I02d675d8267ee07b267155a3806be85fbf57378c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
There are cases that it is needed to use a GPIO pin as chip
select (frames would be too long, for example), so using a GPIO pin as
chip select to keep the line active while the transfer is ongoing is the
usual solution.
This implements that solution for the QMSI shim driver.
Change-Id: Ia6b8f0f17161e20f87ad3def1468fe0abea65fdc
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver uses the QMSI library and mostly translates calls from the
Zephyr API to QMSI ones.
This driver conflicts with the native driver implemenation. In order to
enable it, you must set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH_TO_QMSI"
CONFIG_SPI_QMSI=y
CONFIG_SPI_QMSI_PORT_0=y
CONFIG_SPI_QMSI_PORT_1=y
Missing:
- Support for using a GPIO pin as Chip Select;
Change-Id: I0d8eca88a2a803b6b3604f396f874313fe90753c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.
Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename them to DEVICE_NAME_GET and DEVICE_GET to fit in the 'device'
namespace.
Change-Id: I407a7f284ed4d1c071961b46615eea859c2e825f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Michael Hope
