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arch/arm: add initial support for Cortex-M0/M0+

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Not disabling SysTick as it is optional by the spec.

SVC not used as there is no priority-based interrupt masking (only
PendSV is used).

Largely based on a previous work done by Euan Mutch <euan@abelon.com>.

Jira: ZEP-783

Change-Id: I38e29bfcf0624c1aea5f9fd7a74230faa1b59e8b
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
This commit is contained in:
Ricardo Salveti 2016-10-05 19:43:36 -03:00 • committed by Anas Nashif
commit ffacae20d0
18 changed files with 325 additions and 84 deletions
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43
arch/arm/core/fault.c
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@ -64,13 +64,14 @@
*/
void _FaultDump(const NANO_ESF *esf, int fault)
{
int escalation = 0;
PR_EXC("Fault! EXC #%d, Thread: %p, instr @ 0x%" PRIx32 "\n",
fault,
sys_thread_self_get(),
esf->pc);
#if !defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
int escalation = 0;
if (3 == fault) { /* hard fault */
escalation = _ScbHardFaultIsForced();
PR_EXC("HARD FAULT: %s\n",
@ -99,6 +100,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
/* clear USFR sticky bits */
_ScbUsageFaultAllFaultsReset();
#endif /* !CONFIG_CPU_CORTEX_M0_M0PLUS */
}
#endif
@ -119,6 +121,8 @@ static void _FaultThreadShow(const NANO_ESF *esf)
esf->pc);
}
#if !defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
/**
*
* @brief Dump MPU fault information
@ -226,6 +230,21 @@ static void _UsageFault(const NANO_ESF *esf)
_ScbUsageFaultAllFaultsReset();
}
/**
*
* @brief Dump debug monitor exception information
*
* See _FaultDump() for example.
*
* @return N/A
*/
static void _DebugMonitor(const NANO_ESF *esf)
{
PR_EXC("***** Debug monitor exception (not implemented) *****\n");
}
#endif /* !CONFIG_CPU_CORTEX_M0_M0PLUS */
/**
*
* @brief Dump hard fault information
@ -237,6 +256,10 @@ static void _UsageFault(const NANO_ESF *esf)
static void _HardFault(const NANO_ESF *esf)
{
PR_EXC("***** HARD FAULT *****\n");
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
_FaultThreadShow(esf);
#else /* CONFIG_CPU_CORTEX_M3_M4 */
if (_ScbHardFaultIsBusErrOnVectorRead()) {
PR_EXC(" Bus fault on vector table read\n");
} else if (_ScbHardFaultIsForced()) {
@ -249,19 +272,7 @@ static void _HardFault(const NANO_ESF *esf)
_UsageFault(esf);
}
}
}
/**
*
* @brief Dump debug monitor exception information
*
* See _FaultDump() for example.
*
* @return N/A
*/
static void _DebugMonitor(const NANO_ESF *esf)
{
PR_EXC("***** Debug monitor exception (not implemented) *****\n");
#endif /* !CONFIG_CPU_CORTEX_M0_M0PLUS */
}
/**
@ -304,6 +315,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault)
case 3:
_HardFault(esf);
break;
#if !defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
case 4:
_MpuFault(esf, 0);
break;
@ -316,6 +328,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault)
case 12:
_DebugMonitor(esf);
break;
#endif /* !CONFIG_CPU_CORTEX_M0_M0PLUS */
default:
_ReservedException(esf, fault);
break;