driver: pwm: use new logger

move PWM driver to use new logger.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2018-09-22 20:02:55 -05:00
commit ff9c20826c
9 changed files with 40 additions and 51 deletions

View file

@ -13,19 +13,9 @@ menuconfig PWM
if PWM
config SYS_LOG_PWM_LEVEL
int "PWM Driver Log level"
depends on SYS_LOG
default 0
range 0 4
help
Sets log level for PWM drivers.
Levels are:
0 OFF, do not write
1 ERROR, only write SYS_LOG_ERR
2 WARNING, write SYS_LOG_WRN in addition to previous level
3 INFO, write SYS_LOG_INF in addition to previous levels
4 DEBUG, write SYS_LOG_DBG in addition to previous levels
module = PWM
module-str = pwm
source "subsys/logging/Kconfig.template.log_config"
config PWM_0
bool "Enable PWM port 0"

View file

@ -9,8 +9,9 @@
#include <soc.h>
#include <device_imx.h>
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
#include <logging/sys_log.h>
#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_imx);
#define PWM_PWMSR_FIFOAV_4WORDS 0x4
@ -63,12 +64,12 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
if ((period_cycles == 0) || (pulse_cycles > period_cycles)) {
SYS_LOG_ERR("Invalid combination: period_cycles=%d, "
LOG_ERR("Invalid combination: period_cycles=%d, "
"pulse_cycles=%d", period_cycles, pulse_cycles);
return -EINVAL;
}
SYS_LOG_DBG("enabled=%d, pulse_cycles=%d, period_cycles=%d,"
LOG_DBG("enabled=%d, pulse_cycles=%d, period_cycles=%d,"
" duty_cycle=%d\n", enabled, pulse_cycles, period_cycles,
(100 * pulse_cycles / period_cycles));
@ -89,7 +90,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
sr = PWM_PWMSR_REG(base);
if (fifoav == PWM_PWMSR_FIFOAV(sr)) {
SYS_LOG_WRN("there is no free FIFO slot\n");
LOG_WRN("there is no free FIFO slot\n");
}
}
} else {
@ -101,7 +102,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
(++wait_count < CONFIG_PWM_PWMSWR_LOOP));
if (PWM_PWMCR_SWR(cr)) {
SYS_LOG_WRN("software reset timeout\n");
LOG_WRN("software reset timeout\n");
}
}
@ -119,7 +120,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
PWM_PWMSAR_REG(base) = pulse_cycles;
if (data->period_cycles != period_cycles) {
SYS_LOG_WRN("Changing period cycles from %d to %d in %s",
LOG_WRN("Changing period cycles from %d to %d in %s",
data->period_cycles, period_cycles,
dev->config->name);

View file

@ -10,8 +10,9 @@
#include <fsl_ftm.h>
#include <fsl_clock.h>
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
#include <logging/sys_log.h>
#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_mcux_ftm);
#define MAX_CHANNELS ARRAY_SIZE(FTM0->CONTROLS)
@ -37,20 +38,20 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
u8_t duty_cycle;
if ((period_cycles == 0) || (pulse_cycles > period_cycles)) {
SYS_LOG_ERR("Invalid combination: period_cycles=%d, "
LOG_ERR("Invalid combination: period_cycles=%d, "
"pulse_cycles=%d", period_cycles, pulse_cycles);
return -EINVAL;
}
if (pwm >= config->channel_count) {
SYS_LOG_ERR("Invalid channel");
LOG_ERR("Invalid channel");
return -ENOTSUP;
}
duty_cycle = 100 * pulse_cycles / period_cycles;
data->channel[pwm].dutyCyclePercent = duty_cycle;
SYS_LOG_DBG("pulse_cycles=%d, period_cycles=%d, duty_cycle=%d",
LOG_DBG("pulse_cycles=%d, period_cycles=%d, duty_cycle=%d",
pulse_cycles, period_cycles, duty_cycle);
if (period_cycles != data->period_cycles) {
@ -58,7 +59,7 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
u32_t pwm_freq;
status_t status;
SYS_LOG_WRN("Changing period cycles from %d to %d"
LOG_WRN("Changing period cycles from %d to %d"
" affects all %d channels in %s",
data->period_cycles, period_cycles,
config->channel_count, dev->config->name);
@ -68,10 +69,10 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
clock_freq = CLOCK_GetFreq(config->clock_source);
pwm_freq = (clock_freq >> config->prescale) / period_cycles;
SYS_LOG_DBG("pwm_freq=%d, clock_freq=%d", pwm_freq, clock_freq);
LOG_DBG("pwm_freq=%d, clock_freq=%d", pwm_freq, clock_freq);
if (pwm_freq == 0) {
SYS_LOG_ERR("Could not set up pwm_freq=%d", pwm_freq);
LOG_ERR("Could not set up pwm_freq=%d", pwm_freq);
return -EINVAL;
}
@ -82,7 +83,7 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
pwm_freq, clock_freq);
if (status != kStatus_Success) {
SYS_LOG_ERR("Could not set up pwm");
LOG_ERR("Could not set up pwm");
return -ENOTSUP;
}
FTM_SetSoftwareTrigger(config->base, true);
@ -116,7 +117,7 @@ static int mcux_ftm_init(struct device *dev)
int i;
if (config->channel_count > ARRAY_SIZE(data->channel)) {
SYS_LOG_ERR("Invalid channel count");
LOG_ERR("Invalid channel count");
return -EINVAL;
}

View file

@ -8,9 +8,9 @@
#include "pwm.h"
#define SYS_LOG_DOMAIN "pwm/nrf5_sw"
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
#include <logging/sys_log.h>
#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_nrf5_sw);
struct pwm_config {
NRF_TIMER_Type *timer;
@ -97,18 +97,18 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
ret = pwm_period_check(data, config->map_size, pwm, period_cycles,
pulse_cycles);
if (ret) {
SYS_LOG_ERR("Incompatible period");
LOG_ERR("Incompatible period");
return ret;
}
/* map pwm pin to GPIOTE config/channel */
channel = pwm_channel_map(data, config->map_size, pwm);
if (channel >= config->map_size) {
SYS_LOG_ERR("No more channels available");
LOG_ERR("No more channels available");
return -ENOMEM;
}
SYS_LOG_DBG("PWM %d, period %u, pulse %u", pwm,
LOG_DBG("PWM %d, period %u, pulse %u", pwm,
period_cycles, pulse_cycles);
/* clear GPIOTE config */

View file

@ -6,9 +6,9 @@
#include <nrfx_pwm.h>
#include <pwm.h>
#define SYS_LOG_DOMAIN "pwm_nrfx"
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
#include <logging/sys_log.h>
#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_nrfx);
#define PWM_NRFX_CH_VALUE_NORMAL (1UL << 15)
#define PWM_NRFX_CH_VALUE_INVERTED (0)
@ -108,7 +108,7 @@ static int pwm_nrfx_init(struct device *dev)
NULL);
if (result != NRFX_SUCCESS) {
SYS_LOG_ERR("Failed to initialize device: %s",
LOG_ERR("Failed to initialize device: %s",
dev->config->name);
return -EBUSY;
}

View file

@ -1,5 +1,5 @@
CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_PWM=y
CONFIG_SYS_LOG=y
CONFIG_SYS_LOG_PWM_LEVEL=4
CONFIG_LOG=y
CONFIG_PWM_LOG_LEVEL_DBG=y

View file

@ -1,7 +1,6 @@
CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_SYS_LOG=y
CONFIG_SYS_LOG_PWM_LEVEL=4
CONFIG_LOG=y
CONFIG_PWM_LOG_LEVEL_DBG=y
CONFIG_PWM=y
CONFIG_PWM_NRF5_SW_0_CLOCK_PRESCALER=9

View file

@ -1,5 +1,4 @@
CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_PWM=y
CONFIG_SYS_LOG=y
CONFIG_SYS_LOG_PWM_LEVEL=4
CONFIG_LOG=y
CONFIG_PWM_LOG_LEVEL_DBG=y

View file

@ -1,6 +1,5 @@
CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_PWM=y
CONFIG_PWM_QMSI_NUM_PORTS=3
CONFIG_SYS_LOG=y
CONFIG_SYS_LOG_PWM_LEVEL=4
CONFIG_LOG=y
CONFIG_PWM_LOG_LEVEL_DBG=y