driver: pwm: use new logger
move PWM driver to use new logger. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
parent
f7009d3a95
commit
ff9c20826c
9 changed files with 40 additions and 51 deletions
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@ -13,19 +13,9 @@ menuconfig PWM
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if PWM
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config SYS_LOG_PWM_LEVEL
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int "PWM Driver Log level"
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depends on SYS_LOG
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default 0
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range 0 4
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help
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Sets log level for PWM drivers.
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Levels are:
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0 OFF, do not write
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1 ERROR, only write SYS_LOG_ERR
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2 WARNING, write SYS_LOG_WRN in addition to previous level
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3 INFO, write SYS_LOG_INF in addition to previous levels
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4 DEBUG, write SYS_LOG_DBG in addition to previous levels
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module = PWM
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module-str = pwm
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source "subsys/logging/Kconfig.template.log_config"
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config PWM_0
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bool "Enable PWM port 0"
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@ -9,8 +9,9 @@
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#include <soc.h>
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#include <device_imx.h>
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
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#include <logging/sys_log.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_imx);
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#define PWM_PWMSR_FIFOAV_4WORDS 0x4
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@ -63,12 +64,12 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
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if ((period_cycles == 0) || (pulse_cycles > period_cycles)) {
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SYS_LOG_ERR("Invalid combination: period_cycles=%d, "
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LOG_ERR("Invalid combination: period_cycles=%d, "
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"pulse_cycles=%d", period_cycles, pulse_cycles);
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return -EINVAL;
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}
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SYS_LOG_DBG("enabled=%d, pulse_cycles=%d, period_cycles=%d,"
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LOG_DBG("enabled=%d, pulse_cycles=%d, period_cycles=%d,"
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" duty_cycle=%d\n", enabled, pulse_cycles, period_cycles,
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(100 * pulse_cycles / period_cycles));
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@ -89,7 +90,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
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sr = PWM_PWMSR_REG(base);
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if (fifoav == PWM_PWMSR_FIFOAV(sr)) {
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SYS_LOG_WRN("there is no free FIFO slot\n");
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LOG_WRN("there is no free FIFO slot\n");
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}
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}
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} else {
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@ -101,7 +102,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
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(++wait_count < CONFIG_PWM_PWMSWR_LOOP));
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if (PWM_PWMCR_SWR(cr)) {
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SYS_LOG_WRN("software reset timeout\n");
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LOG_WRN("software reset timeout\n");
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}
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}
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@ -119,7 +120,7 @@ static int imx_pwm_pin_set(struct device *dev, u32_t pwm,
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PWM_PWMSAR_REG(base) = pulse_cycles;
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if (data->period_cycles != period_cycles) {
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SYS_LOG_WRN("Changing period cycles from %d to %d in %s",
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LOG_WRN("Changing period cycles from %d to %d in %s",
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data->period_cycles, period_cycles,
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dev->config->name);
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@ -10,8 +10,9 @@
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#include <fsl_ftm.h>
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#include <fsl_clock.h>
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
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#include <logging/sys_log.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_mcux_ftm);
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#define MAX_CHANNELS ARRAY_SIZE(FTM0->CONTROLS)
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@ -37,20 +38,20 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
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u8_t duty_cycle;
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if ((period_cycles == 0) || (pulse_cycles > period_cycles)) {
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SYS_LOG_ERR("Invalid combination: period_cycles=%d, "
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LOG_ERR("Invalid combination: period_cycles=%d, "
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"pulse_cycles=%d", period_cycles, pulse_cycles);
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return -EINVAL;
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}
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if (pwm >= config->channel_count) {
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SYS_LOG_ERR("Invalid channel");
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LOG_ERR("Invalid channel");
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return -ENOTSUP;
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}
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duty_cycle = 100 * pulse_cycles / period_cycles;
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data->channel[pwm].dutyCyclePercent = duty_cycle;
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SYS_LOG_DBG("pulse_cycles=%d, period_cycles=%d, duty_cycle=%d",
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LOG_DBG("pulse_cycles=%d, period_cycles=%d, duty_cycle=%d",
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pulse_cycles, period_cycles, duty_cycle);
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if (period_cycles != data->period_cycles) {
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@ -58,7 +59,7 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
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u32_t pwm_freq;
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status_t status;
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SYS_LOG_WRN("Changing period cycles from %d to %d"
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LOG_WRN("Changing period cycles from %d to %d"
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" affects all %d channels in %s",
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data->period_cycles, period_cycles,
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config->channel_count, dev->config->name);
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@ -68,10 +69,10 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
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clock_freq = CLOCK_GetFreq(config->clock_source);
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pwm_freq = (clock_freq >> config->prescale) / period_cycles;
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SYS_LOG_DBG("pwm_freq=%d, clock_freq=%d", pwm_freq, clock_freq);
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LOG_DBG("pwm_freq=%d, clock_freq=%d", pwm_freq, clock_freq);
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if (pwm_freq == 0) {
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SYS_LOG_ERR("Could not set up pwm_freq=%d", pwm_freq);
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LOG_ERR("Could not set up pwm_freq=%d", pwm_freq);
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return -EINVAL;
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}
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@ -82,7 +83,7 @@ static int mcux_ftm_pin_set(struct device *dev, u32_t pwm,
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pwm_freq, clock_freq);
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if (status != kStatus_Success) {
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SYS_LOG_ERR("Could not set up pwm");
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LOG_ERR("Could not set up pwm");
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return -ENOTSUP;
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}
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FTM_SetSoftwareTrigger(config->base, true);
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@ -116,7 +117,7 @@ static int mcux_ftm_init(struct device *dev)
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int i;
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if (config->channel_count > ARRAY_SIZE(data->channel)) {
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SYS_LOG_ERR("Invalid channel count");
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LOG_ERR("Invalid channel count");
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return -EINVAL;
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}
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@ -8,9 +8,9 @@
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#include "pwm.h"
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#define SYS_LOG_DOMAIN "pwm/nrf5_sw"
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
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#include <logging/sys_log.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_nrf5_sw);
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struct pwm_config {
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NRF_TIMER_Type *timer;
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@ -97,18 +97,18 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
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ret = pwm_period_check(data, config->map_size, pwm, period_cycles,
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pulse_cycles);
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if (ret) {
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SYS_LOG_ERR("Incompatible period");
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LOG_ERR("Incompatible period");
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return ret;
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}
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/* map pwm pin to GPIOTE config/channel */
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channel = pwm_channel_map(data, config->map_size, pwm);
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if (channel >= config->map_size) {
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SYS_LOG_ERR("No more channels available");
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LOG_ERR("No more channels available");
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return -ENOMEM;
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}
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SYS_LOG_DBG("PWM %d, period %u, pulse %u", pwm,
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LOG_DBG("PWM %d, period %u, pulse %u", pwm,
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period_cycles, pulse_cycles);
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/* clear GPIOTE config */
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@ -6,9 +6,9 @@
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#include <nrfx_pwm.h>
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#include <pwm.h>
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#define SYS_LOG_DOMAIN "pwm_nrfx"
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
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#include <logging/sys_log.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_nrfx);
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#define PWM_NRFX_CH_VALUE_NORMAL (1UL << 15)
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#define PWM_NRFX_CH_VALUE_INVERTED (0)
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@ -108,7 +108,7 @@ static int pwm_nrfx_init(struct device *dev)
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NULL);
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if (result != NRFX_SUCCESS) {
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SYS_LOG_ERR("Failed to initialize device: %s",
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LOG_ERR("Failed to initialize device: %s",
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dev->config->name);
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return -EBUSY;
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}
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@ -1,5 +1,5 @@
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CONFIG_STDOUT_CONSOLE=y
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CONFIG_PRINTK=y
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CONFIG_PWM=y
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CONFIG_SYS_LOG=y
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CONFIG_SYS_LOG_PWM_LEVEL=4
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CONFIG_LOG=y
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CONFIG_PWM_LOG_LEVEL_DBG=y
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@ -1,7 +1,6 @@
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CONFIG_STDOUT_CONSOLE=y
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CONFIG_PRINTK=y
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CONFIG_SYS_LOG=y
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CONFIG_SYS_LOG_PWM_LEVEL=4
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CONFIG_LOG=y
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CONFIG_PWM_LOG_LEVEL_DBG=y
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CONFIG_PWM=y
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CONFIG_PWM_NRF5_SW_0_CLOCK_PRESCALER=9
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@ -1,5 +1,4 @@
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CONFIG_STDOUT_CONSOLE=y
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CONFIG_PRINTK=y
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CONFIG_PWM=y
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CONFIG_SYS_LOG=y
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CONFIG_SYS_LOG_PWM_LEVEL=4
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CONFIG_LOG=y
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CONFIG_PWM_LOG_LEVEL_DBG=y
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@ -1,6 +1,5 @@
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CONFIG_STDOUT_CONSOLE=y
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CONFIG_PRINTK=y
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CONFIG_PWM=y
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CONFIG_PWM_QMSI_NUM_PORTS=3
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CONFIG_SYS_LOG=y
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CONFIG_SYS_LOG_PWM_LEVEL=4
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CONFIG_LOG=y
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CONFIG_PWM_LOG_LEVEL_DBG=y
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