From ff1ccbd83c54b9275b20a9e89fbb7ae24fe03bf2 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Sun, 5 Sep 2021 15:27:56 -0700 Subject: [PATCH] soc: intel_adsp: Unify bootloader configuration The generic bootloader code used a per-device "platform.h" file imported from SOF. These turn out to have very little actual content. Move them to the core directory in a single header for now, pending some rework to place the settings in devicetree. Signed-off-by: Andy Ross --- .../cavs_v15/include/soc/platform.h | 25 ------------- .../cavs_v18/include/soc/platform.h | 29 --------------- .../cavs_v20/include/soc/platform.h | 30 ---------------- .../cavs_v25/include/soc/platform.h | 30 ---------------- .../intel_adsp/common/bootloader/boot_entry.S | 4 ++- .../common/bootloader/boot_loader.c | 2 +- .../intel_adsp/common/bootloader/platform.h | 35 +++++++++++++++++++ 7 files changed, 39 insertions(+), 116 deletions(-) delete mode 100644 soc/xtensa/intel_adsp/cavs_v15/include/soc/platform.h delete mode 100644 soc/xtensa/intel_adsp/cavs_v18/include/soc/platform.h delete mode 100644 soc/xtensa/intel_adsp/cavs_v20/include/soc/platform.h delete mode 100644 soc/xtensa/intel_adsp/cavs_v25/include/soc/platform.h create mode 100644 soc/xtensa/intel_adsp/common/bootloader/platform.h diff --git a/soc/xtensa/intel_adsp/cavs_v15/include/soc/platform.h b/soc/xtensa/intel_adsp/cavs_v15/include/soc/platform.h deleted file mode 100644 index 91dc18205cf..00000000000 --- a/soc/xtensa/intel_adsp/cavs_v15/include/soc/platform.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 - * - * Copyright(c) 2016 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Xiuli Pan - */ - -#ifndef __PLATFORM_PLATFORM_H__ -#define __PLATFORM_PLATFORM_H__ - -#define PLATFORM_RESET_MHE_AT_BOOT 1 - -#define PLATFORM_DISABLE_L2CACHE_AT_BOOT 1 - -#define PLATFORM_PRIMARY_CORE_ID 0 - -#define MAX_CORE_COUNT 2 - -#if PLATFORM_CORE_COUNT > MAX_CORE_COUNT -#error "Invalid core count - exceeding core limit" -#endif - -#endif /* __PLATFORM_PLATFORM_H__ */ diff --git a/soc/xtensa/intel_adsp/cavs_v18/include/soc/platform.h b/soc/xtensa/intel_adsp/cavs_v18/include/soc/platform.h deleted file mode 100644 index b01a362006e..00000000000 --- a/soc/xtensa/intel_adsp/cavs_v18/include/soc/platform.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 - * - * Copyright(c) 2016 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Xiuli Pan - */ - -#ifndef __PLATFORM_PLATFORM_H__ -#define __PLATFORM_PLATFORM_H__ - -#define PLATFORM_RESET_MHE_AT_BOOT 1 - -#define PLATFORM_MEM_INIT_AT_BOOT 1 - -#define PLATFORM_PRIMARY_CORE_ID 0 - -#define MAX_CORE_COUNT 4 - -#define PLATFORM_HPSRAM_EBB_COUNT 47 - -#define EBB_SEGMENT_SIZE 32 - -#if PLATFORM_CORE_COUNT > MAX_CORE_COUNT -#error "Invalid core count - exceeding core limit" -#endif - -#endif /* __PLATFORM_PLATFORM_H__ */ diff --git a/soc/xtensa/intel_adsp/cavs_v20/include/soc/platform.h b/soc/xtensa/intel_adsp/cavs_v20/include/soc/platform.h deleted file mode 100644 index 9db1670f6b7..00000000000 --- a/soc/xtensa/intel_adsp/cavs_v20/include/soc/platform.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 - * - * Copyright(c) 2017 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Rander Wang - * Xiuli Pan - */ - -#ifndef __PLATFORM_PLATFORM_H__ -#define __PLATFORM_PLATFORM_H__ - -#define PLATFORM_RESET_MHE_AT_BOOT 1 - -#define PLATFORM_MEM_INIT_AT_BOOT 1 - -#define PLATFORM_PRIMARY_CORE_ID 0 - -#define MAX_CORE_COUNT 4 - -#define PLATFORM_HPSRAM_EBB_COUNT 47 - -#define EBB_SEGMENT_SIZE 32 - -#if PLATFORM_CORE_COUNT > MAX_CORE_COUNT -#error "Invalid core count - exceeding core limit" -#endif - -#endif /* __PLATFORM_PLATFORM_H__ */ diff --git a/soc/xtensa/intel_adsp/cavs_v25/include/soc/platform.h b/soc/xtensa/intel_adsp/cavs_v25/include/soc/platform.h deleted file mode 100644 index 767c609a2ae..00000000000 --- a/soc/xtensa/intel_adsp/cavs_v25/include/soc/platform.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 - * - * Copyright(c) 2017 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Rander Wang - * Xiuli Pan - */ - -#ifndef __PLATFORM_PLATFORM_H__ -#define __PLATFORM_PLATFORM_H__ - -#define PLATFORM_RESET_MHE_AT_BOOT 1 - -#define PLATFORM_MEM_INIT_AT_BOOT 1 - -#define PLATFORM_PRIMARY_CORE_ID 0 - -#define MAX_CORE_COUNT 4 - -#define PLATFORM_HPSRAM_EBB_COUNT 30 - -#define EBB_SEGMENT_SIZE 32 - -#if PLATFORM_CORE_COUNT > MAX_CORE_COUNT -#error "Invalid core count - exceeding core limit" -#endif - -#endif /* __PLATFORM_PLATFORM_H__ */ diff --git a/soc/xtensa/intel_adsp/common/bootloader/boot_entry.S b/soc/xtensa/intel_adsp/common/bootloader/boot_entry.S index 3715518863a..349b979afe5 100644 --- a/soc/xtensa/intel_adsp/common/bootloader/boot_entry.S +++ b/soc/xtensa/intel_adsp/common/bootloader/boot_entry.S @@ -16,10 +16,12 @@ #include #include #include -#include #include #include #include +#include "platform.h" + +#define PLATFORM_PRIMARY_CORE_ID 0 #define SHIM_ADDR DT_REG_ADDR(DT_NODELABEL(shim)) #define SHIM_L2_MECS (SHIM_ADDR + 0xd0) diff --git a/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c b/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c index beabbd224ee..d361f5ca857 100644 --- a/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c +++ b/soc/xtensa/intel_adsp/common/bootloader/boot_loader.c @@ -11,13 +11,13 @@ #include #include -#include #include #include #include #include #include #include +#include "platform.h" #include "manifest.h" #if CONFIG_SOC_INTEL_S1000 diff --git a/soc/xtensa/intel_adsp/common/bootloader/platform.h b/soc/xtensa/intel_adsp/common/bootloader/platform.h new file mode 100644 index 00000000000..8f3f8190b33 --- /dev/null +++ b/soc/xtensa/intel_adsp/common/bootloader/platform.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: Apache-2.0 + * Copyright (c) 2021 Intel Corporation. All rights reserved. + */ +#ifndef ZEPHYR_INCLUDE_INTEL_ADSP_PLATFORM_H_ +#define ZEPHYR_INCLUDE_INTEL_ADSP_PLATFORM_H_ + +/* Various cAVS platform dependencies needed by the bootloader code. + * These probably want to migrate to devicetree. + */ + +#if defined(CONFIG_SOC_SERIES_INTEL_CAVS_V25) +#define PLATFORM_RESET_MHE_AT_BOOT +#define PLATFORM_MEM_INIT_AT_BOOT +#define PLATFORM_HPSRAM_EBB_COUNT 30 +#define EBB_SEGMENT_SIZE 32 + +#elif defined(CONFIG_SOC_SERIES_INTEL_CAVS_V20) +#define PLATFORM_RESET_MHE_AT_BOOT +#define PLATFORM_MEM_INIT_AT_BOOT +#define PLATFORM_HPSRAM_EBB_COUNT 47 +#define EBB_SEGMENT_SIZE 32 + +#elif defined(CONFIG_SOC_SERIES_INTEL_CAVS_V18) +#define PLATFORM_RESET_MHE_AT_BOOT +#define PLATFORM_MEM_INIT_AT_BOOT +#define PLATFORM_HPSRAM_EBB_COUNT 47 +#define EBB_SEGMENT_SIZE 32 + +#elif defined(CONFIG_SOC_SERIES_INTEL_CAVS_V15) +#define PLATFORM_RESET_MHE_AT_BOOT +#define PLATFORM_DISABLE_L2CACHE_AT_BOOT + +#endif + +#endif /* ZEPHYR_INCLUDE_INTEL_ADSP_PLATFORM_H_ */