From fef5425379af70eaa62f9980a39a3b418a2f5857 Mon Sep 17 00:00:00 2001 From: Guillaume Gautier Date: Wed, 22 Mar 2023 10:45:22 +0100 Subject: [PATCH] boards: update stm32 i2s pll configuration Add plli2s node to dts/overlay file for boards that already use I2S. Remove old I2S Kconfig not used anymore Signed-off-by: Guillaume Gautier --- boards/arm/96b_argonkey/96b_argonkey.dts | 7 +++ boards/arm/96b_argonkey/Kconfig.defconfig | 17 ------- .../96b_stm32_sensor_mez.dts | 7 +++ .../96b_stm32_sensor_mez/Kconfig.defconfig | 17 ------- .../boards/nucleo_f411re.defconfig | 45 ------------------- .../boards/nucleo_f411re.overlay | 6 +++ 6 files changed, 20 insertions(+), 79 deletions(-) delete mode 100644 boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig diff --git a/boards/arm/96b_argonkey/96b_argonkey.dts b/boards/arm/96b_argonkey/96b_argonkey.dts index 1828e12def2..05920213cf8 100644 --- a/boards/arm/96b_argonkey/96b_argonkey.dts +++ b/boards/arm/96b_argonkey/96b_argonkey.dts @@ -65,6 +65,13 @@ status = "okay"; }; +&plli2s { + div-m = <8>; + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; diff --git a/boards/arm/96b_argonkey/Kconfig.defconfig b/boards/arm/96b_argonkey/Kconfig.defconfig index e9c35748996..7ee85442eae 100644 --- a/boards/arm/96b_argonkey/Kconfig.defconfig +++ b/boards/arm/96b_argonkey/Kconfig.defconfig @@ -8,23 +8,6 @@ if BOARD_96B_ARGONKEY config BOARD default "96b_argonkey" -if I2S - -# configure PLLI2S to generate a I2SxCLK=128MHz -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - if LSM6DSL choice LSM6DSL_TRIGGER_MODE diff --git a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts index dd629a29476..10627da0b75 100644 --- a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts +++ b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts @@ -69,6 +69,13 @@ status = "okay"; }; +&plli2s { + div-m = <8>; + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; diff --git a/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig b/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig index cb3d196df06..bfe0f730222 100644 --- a/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig +++ b/boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig @@ -8,23 +8,6 @@ if BOARD_96B_STM32_SENSOR_MEZ config BOARD default "96b_stm32_sensor_mez" -if I2S - -# configure PLLI2S to generate a I2SxCLK=128MHz -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - config SPI_STM32_INTERRUPT default y depends on SPI diff --git a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig deleted file mode 100644 index e0578796c15..00000000000 --- a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig +++ /dev/null @@ -1,45 +0,0 @@ -# Copyright (c) 2020 STMicroelectronics -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NUCLEO_F411RE - -if I2S - -# The I2S should be configured in such a way it generates a 2MHz -# clock to the MP34DT05 microphone. -# -# The input clock to I2S block is I2SClk. This clock is generated -# by the PLLI2S from either HSI or HSE osci using this formula: -# -# Fin = HSE or HSI osci -# Fvco = Fin x (PLLN/PLLM) -# I2SClk = Fvco / PLLR -# -# For example, if Fin is HSE at 8MHz and PLLM=8, PLLN=192, PLLR=3, -# the resulting I2SCLk is 64MHz. On the contrary if HSI at 16MHz is -# used the resulting I2SClk frequency would be 128MHz. -# The shield user is invited to verify which osci is configured on -# Nucleo F441RE board defconfig file and calculate the final frequency. -# -# The I2S block then uses I2SDIV and I2SODD register fields to further -# divide I2SClk. These parameters are automatically calculated by -# I2S driver, in order to obtain the requested output @2MHz, so -# having a I2SClk in input at 64MHz or 128MHz does not make a any -# difference. - -config I2S_STM32_USE_PLLI2S_ENABLE - default y - -config I2S_STM32_PLLI2S_PLLM - default 8 - -config I2S_STM32_PLLI2S_PLLN - default 192 - -config I2S_STM32_PLLI2S_PLLR - default 3 - -endif # I2S - -endif # BOARD_NUCLEO_F411RE diff --git a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay index 3e9da59abcd..1591debc937 100644 --- a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay +++ b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay @@ -4,6 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +&plli2s { + mul-n = <192>; + div-r = <3>; + status = "okay"; +}; + &dma2 { status = "okay"; };