From feae3249b2a300b7ba3a920b7edb54ae253b4130 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20=C3=85berg?= <martin.aberg@gaisler.com>
Date: Tue, 27 Oct 2020 12:31:41 +0100
Subject: [PATCH] sparc: add support for thread local storage
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Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch. Register g7 is
used to point to the thread data. Thread data is accessed with negative
offsets from g7.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
---
 arch/Kconfig                   |  1 +
 arch/sparc/core/CMakeLists.txt |  1 +
 arch/sparc/core/switch.S       |  3 +++
 arch/sparc/core/tls.c          | 22 ++++++++++++++++++++++
 include/arch/sparc/linker.ld   |  1 +
 5 files changed, 28 insertions(+)
 create mode 100644 arch/sparc/core/tls.c

diff --git a/arch/Kconfig b/arch/Kconfig
index 274d5bdafc5..3934ce886cf 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -45,6 +45,7 @@ config SPARC
 	select BIG_ENDIAN
 	select ATOMIC_OPERATIONS_BUILTIN if SPARC_CASA
 	select ATOMIC_OPERATIONS_C if !SPARC_CASA
+	select ARCH_HAS_THREAD_LOCAL_STORAGE
 	help
 	  SPARC architecture
 
diff --git a/arch/sparc/core/CMakeLists.txt b/arch/sparc/core/CMakeLists.txt
index 28b5559d3ab..82ff7906638 100644
--- a/arch/sparc/core/CMakeLists.txt
+++ b/arch/sparc/core/CMakeLists.txt
@@ -17,3 +17,4 @@ zephyr_library_sources(
 )
 
 zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
+zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
diff --git a/arch/sparc/core/switch.S b/arch/sparc/core/switch.S
index 17b12ce6c0c..1fe71edb52d 100644
--- a/arch/sparc/core/switch.S
+++ b/arch/sparc/core/switch.S
@@ -118,6 +118,9 @@ SECTION_FUNC(TEXT, z_sparc_context_switch)
 
 	/* restore output registers */
 	ldd	[%o0 + _thread_offset_to_o6], %o6
+#ifdef CONFIG_THREAD_LOCAL_STORAGE
+	ld	[%o0 + _thread_offset_to_tls], %g7
+#endif
 
 	ld	[%o0 + _thread_offset_to_psr], %g1  /* %g1 = new thread psr */
 
diff --git a/arch/sparc/core/tls.c b/arch/sparc/core/tls.c
new file mode 100644
index 00000000000..8e9d5bee1b8
--- /dev/null
+++ b/arch/sparc/core/tls.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2019-2020 Cobham Gaisler AB
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <kernel_structs.h>
+#include <kernel_internal.h>
+#include <kernel_tls.h>
+#include <app_memory/app_memdomain.h>
+#include <sys/util.h>
+
+size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr)
+{
+	new_thread->tls = POINTER_TO_UINT(stack_ptr);
+
+	stack_ptr -= z_tls_data_size();
+	z_tls_copy(stack_ptr);
+
+	return z_tls_data_size();
+}
diff --git a/include/arch/sparc/linker.ld b/include/arch/sparc/linker.ld
index f7b1fb02d28..486845d7487 100644
--- a/include/arch/sparc/linker.ld
+++ b/include/arch/sparc/linker.ld
@@ -42,6 +42,7 @@ SECTIONS
     _image_text_end = .;
 
 #include <linker/common-rom.ld>
+#include <linker/thread-local-storage.ld>
 
     SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
 	{