From fdd3ba896adf6b7709de5452347a89e779e438f2 Mon Sep 17 00:00:00 2001 From: Andrew Boie Date: Thu, 10 Oct 2019 16:31:13 -0700 Subject: [PATCH] x86: intel64: set the WP bit for paging Otherwise, supervisor mode can write to read-only areas, failing tests that check this. Signed-off-by: Andrew Boie --- arch/x86/core/intel64/locore.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/core/intel64/locore.S b/arch/x86/core/intel64/locore.S index b0980549d49..aed28fd2861 100644 --- a/arch/x86/core/intel64/locore.S +++ b/arch/x86/core/intel64/locore.S @@ -118,7 +118,7 @@ go64: movl %cr4, %eax /* enable PAE and SSE */ wrmsr movl %cr0, %eax /* enable paging */ - orl $CR0_PG, %eax + orl $(CR0_PG | CR0_WP), %eax movl %eax, %cr0 jmpl $X86_KERNEL_CS, $1f