boards: arm: mimxrt595: Add CTimer driver for mimxrt595_evk

Add counter support using CTimer for RT595.
Tested with samples/drivers/counter/alarm.

Signed-off-by: Chay Guo <changyi.guo@nxp.com>

boards/arm/mimxrt595_evk/doc/index.rst

@@ -81,6 +81,8 @@ features:
 +-----------+------------+-------------------------------------+
 | SPI       | on-chip    | spi                                 |
 +-----------+------------+-------------------------------------+
+| CTIMER    | on-chip    | counter                             |
++-----------+------------+-------------------------------------+
 
 The default configuration can be found in the defconfig file:
 

boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts

@@ -200,6 +200,26 @@ arduino_serial: &flexcomm12 {
 	status = "okay";
 };
 
+&ctimer0 {
+	status = "okay";
+};
+
+&ctimer1 {
+	status = "okay";
+};
+
+&ctimer2 {
+	status = "okay";
+};
+
+&ctimer3 {
+	status = "okay";
+};
+
+&ctimer4 {
+	status = "okay";
+};
+
 &flexspi {
 	mx25um51345g: mx25um51345g@2 {
 		compatible = "nxp,imx-flexspi-mx25um51345g";

boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.yaml

@@ -18,6 +18,7 @@ supported:
   - arduino_gpio
   - arduino_i2c
   - arduino_serial
+  - counter
   - dma
   - gpio
   - i2c

soc/arm/nxp_imx/rt5xx/Kconfig.defconfig.mimxrt595_cm33

@@ -36,6 +36,10 @@ config DMA_MCUX_LPC
 	default y
 	depends on DMA
 
+config COUNTER_MCUX_CTIMER
+	default y
+	depends on COUNTER
+
 if MCUX_OS_TIMER
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC

soc/arm/nxp_imx/rt5xx/soc.c

@@ -25,6 +25,12 @@
 /* Core clock frequency: 198000000Hz */
 #define CLOCK_INIT_CORE_CLOCK                     198000000U
 
+#define CTIMER_CLOCK_SOURCE(node_id) \
+	TO_CTIMER_CLOCK_SOURCE(DT_CLOCKS_CELL(node_id, name), DT_PROP(node_id, clk_source))
+#define TO_CTIMER_CLOCK_SOURCE(inst, val) TO_CLOCK_ATTACH_ID(inst, val)
+#define TO_CLOCK_ATTACH_ID(inst, val) CLKCTL1_TUPLE_MUXA(CT32BIT##inst##FCLKSEL_OFFSET, val)
+#define CTIMER_CLOCK_SETUP(node_id) CLOCK_AttachClk(CTIMER_CLOCK_SOURCE(node_id));
+
 const clock_sys_pll_config_t g_sysPllConfig_clock_init = {
 	/* OSC clock */
 	.sys_pll_src = kCLOCK_SysPllXtalIn,
@@ -198,6 +204,8 @@ void clock_init(void)
 	/* Switch CLKOUT to FRO_DIV2 */
 	CLOCK_AttachClk(kFRO_DIV2_to_CLKOUT);
 
+	DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
+
 	/* Set up dividers. */
 	/* Set AUDIOPLLCLKDIV divider to value 15 */
 	CLOCK_SetClkDiv(kCLOCK_DivAudioPllClk, 15U);