openisa_rv32m1: kconfig: Remove base address/size symbols
RISCV_RV32M1_VECTOR_BASE_ADDR is unused after commit 34b0516466
("boards: riscv32: rv32m1_vega: enable MCUboot for ri5cy core") (it was
called RISCV32_RV32M1_BASE_ADDR then).
RISCV_RV32M1_VECTOR_SIZE is still used, but is always 0x100, so remove
it too.
These symbols were only defined in a Kconfig.defconfig file.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
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parent
ee57c8e749
commit
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2 changed files with 1 additions and 12 deletions
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@ -41,17 +41,6 @@ config RISCV_SOC_INTERRUPT_INIT
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config WDOG_INIT
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def_bool y
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# The event unit looks for vector tables at the end of each core's
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# flash space. These vector tables are not relocatable.
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config RISCV_RV32M1_VECTOR_BASE_ADDR
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hex
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default 0x000FFF00 if SOC_OPENISA_RV32M1_RI5CY
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default 0x0103FF00 if SOC_OPENISA_RV32M1_ZERO_RISCY
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config RISCV_RV32M1_VECTOR_SIZE
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hex
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default 0x100
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 8000000
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@ -26,7 +26,7 @@
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#define ROMABLE_REGION ROM
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#define RAMABLE_REGION RAM
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#define VECTOR_SIZE CONFIG_RISCV_RV32M1_VECTOR_SIZE
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#define VECTOR_SIZE 0x100
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#ifdef CONFIG_USE_DT_CODE_PARTITION
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