From fcfff0633eac54e8f4db552e81c01a7e1b761b1f Mon Sep 17 00:00:00 2001 From: Johan Hedberg Date: Wed, 9 Nov 2022 13:21:47 +0200 Subject: [PATCH] drivers: uart_ns16550: Convert to use runtime PCIe BDF lookup Convert the ns16550 driver to use the new centralized runtime BDF lookup of PCIe devices. Signed-off-by: Johan Hedberg --- drivers/serial/uart_ns16550.c | 29 ++++++++------- dts/bindings/serial/ns16550.yaml | 5 +-- dts/x86/intel/apollo_lake.dtsi | 28 ++++++++------ dts/x86/intel/elkhart_lake.dtsi | 63 ++++++++++++++++++-------------- 4 files changed, 68 insertions(+), 57 deletions(-) diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c index ba2b22e24d0..b40f867df15 100644 --- a/drivers/serial/uart_ns16550.c +++ b/drivers/serial/uart_ns16550.c @@ -237,9 +237,7 @@ struct uart_ns16550_device_config { #endif uint8_t reg_interval; #if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie) - bool pcie; - pcie_bdf_t pcie_bdf; - pcie_id_t pcie_id; + struct pcie_dev *pcie; #endif }; @@ -335,13 +333,13 @@ static int uart_ns16550_configure(const struct device *dev, if (dev_cfg->pcie) { struct pcie_bar mbar; - if (!pcie_probe(dev_cfg->pcie_bdf, dev_cfg->pcie_id)) { + if (dev_cfg->pcie->bdf == PCIE_BDF_NONE) { ret = -EINVAL; goto out; } - pcie_probe_mbar(dev_cfg->pcie_bdf, 0, &mbar); - pcie_set_cmd(dev_cfg->pcie_bdf, PCIE_CONF_CMDSTAT_MEM, true); + pcie_probe_mbar(dev_cfg->pcie->bdf, 0, &mbar); + pcie_set_cmd(dev_cfg->pcie->bdf, PCIE_CONF_CMDSTAT_MEM, true); device_map(DEVICE_MMIO_RAM_PTR(dev), mbar.phys_addr, mbar.size, K_MEM_CACHE_NONE); @@ -1061,21 +1059,21 @@ static const struct uart_driver_api uart_ns16550_driver_api = { #define UART_NS16550_IRQ_CONFIG_PCIE1(n) \ static void irq_config_func##n(const struct device *dev) \ { \ - ARG_UNUSED(dev); \ BUILD_ASSERT(DT_INST_IRQN(n) == PCIE_IRQ_DETECT, \ "Only runtime IRQ configuration is supported"); \ BUILD_ASSERT(IS_ENABLED(CONFIG_DYNAMIC_INTERRUPTS), \ "NS16550 PCIe requires dynamic interrupts"); \ - unsigned int irq = pcie_alloc_irq(DT_INST_REG_ADDR(n)); \ + const struct uart_ns16550_device_config *dev_cfg = dev->config;\ + unsigned int irq = pcie_alloc_irq(dev_cfg->pcie->bdf); \ if (irq == PCIE_CONF_INTR_IRQ_NONE) { \ return; \ } \ - pcie_connect_dynamic_irq(DT_INST_REG_ADDR(n), irq, \ + pcie_connect_dynamic_irq(dev_cfg->pcie->bdf, irq, \ DT_INST_IRQ(n, priority), \ (void (*)(const void *))uart_ns16550_isr, \ DEVICE_DT_INST_GET(n), \ UART_NS16550_IRQ_FLAGS(n)); \ - pcie_irq_enable(DT_INST_REG_ADDR(n), irq); \ + pcie_irq_enable(dev_cfg->pcie->bdf, irq); \ } #ifdef CONFIG_UART_NS16550_ACCESS_IOPORT @@ -1109,13 +1107,15 @@ static const struct uart_driver_api uart_ns16550_driver_api = { #endif #define DEV_CONFIG_PCIE0(n) -#define DEV_CONFIG_PCIE1(n) \ - .pcie = true, \ - .pcie_bdf = DT_INST_REG_ADDR(n), \ - .pcie_id = DT_INST_REG_SIZE(n), +#define DEV_CONFIG_PCIE1(n) DEVICE_PCIE_INST_INIT(n, pcie) #define DEV_CONFIG_PCIE_INIT(n) \ _CONCAT(DEV_CONFIG_PCIE, DT_INST_ON_BUS(n, pcie))(n) +#define DEV_DECLARE_PCIE0(n) +#define DEV_DECLARE_PCIE1(n) DEVICE_PCIE_INST_DECLARE(n) +#define DEV_PCIE_DECLARE(n) \ + _CONCAT(DEV_DECLARE_PCIE, DT_INST_ON_BUS(n, pcie))(n) + #define DEV_DATA_FLOW_CTRL0 UART_CFG_FLOW_CTRL_NONE #define DEV_DATA_FLOW_CTRL1 UART_CFG_FLOW_CTRL_RTS_CTS #define DEV_DATA_FLOW_CTRL(n) \ @@ -1129,6 +1129,7 @@ static const struct uart_driver_api uart_ns16550_driver_api = { #define UART_NS16550_DEVICE_INIT(n) \ UART_NS16550_IRQ_FUNC_DECLARE(n); \ + DEV_PCIE_DECLARE(n); \ static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_##n = { \ DEV_CONFIG_REG_INIT(n) \ COND_CODE_1(DT_INST_NODE_HAS_PROP(n, clock_frequency), ( \ diff --git a/dts/bindings/serial/ns16550.yaml b/dts/bindings/serial/ns16550.yaml index 69dc3a3908a..8834a373ed5 100644 --- a/dts/bindings/serial/ns16550.yaml +++ b/dts/bindings/serial/ns16550.yaml @@ -2,12 +2,9 @@ description: ns16550 UART compatible: "ns16550" -include: uart-controller.yaml +include: [uart-controller.yaml, pcie-device.yaml] properties: - reg: - required: true - reg-shift: type: int required: true diff --git a/dts/x86/intel/apollo_lake.dtsi b/dts/x86/intel/apollo_lake.dtsi index 3c53050c91d..30bc2565e0b 100644 --- a/dts/x86/intel/apollo_lake.dtsi +++ b/dts/x86/intel/apollo_lake.dtsi @@ -41,12 +41,13 @@ compatible = "intel,pcie"; ranges; - uart0: uart@c000 { + uart0: uart0 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x5abc>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -54,12 +55,13 @@ current-speed = <115200>; }; - uart1: uart@c100 { + uart1: uart1 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x5abe>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -68,12 +70,13 @@ current-speed = <115200>; }; - uart2: uart@c200 { + uart2: uart2 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x5ac0>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -82,12 +85,13 @@ current-speed = <115200>; }; - uart3: uart@c300 { + uart3: uart3 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x5aee>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; diff --git a/dts/x86/intel/elkhart_lake.dtsi b/dts/x86/intel/elkhart_lake.dtsi index ed0000475c3..2f1feda7603 100644 --- a/dts/x86/intel/elkhart_lake.dtsi +++ b/dts/x86/intel/elkhart_lake.dtsi @@ -54,12 +54,13 @@ status = "okay"; }; - uart0: uart@f000 { + uart0: uart0 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b28>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -67,12 +68,13 @@ current-speed = <115200>; }; - uart1: uart@f100 { + uart1: uart1 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b29>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -81,12 +83,13 @@ current-speed = <115200>; }; - uart2: uart@ca00 { + uart2: uart2 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b4d>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -95,12 +98,13 @@ current-speed = <115200>; }; - uart_pse_0: uart@8800 { + uart_pse_0: uart_pse_0 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b96>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -109,12 +113,13 @@ current-speed = <115200>; }; - uart_pse_1: uart@8900 { + uart_pse_1: uart_pse_1 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b97>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -123,12 +128,13 @@ current-speed = <115200>; }; - uart_pse_2: uart@8a00 { + uart_pse_2: uart_pse_2 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b98>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -137,12 +143,13 @@ current-speed = <115200>; }; - uart_pse_3: uart@8b00 { + uart_pse_3: uart_pse_3 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b99>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -151,12 +158,13 @@ current-speed = <115200>; }; - uart_pse_4: uart@8c00 { + uart_pse_4: uart_pse_4 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b9a>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>; @@ -165,12 +173,13 @@ current-speed = <115200>; }; - uart_pse_5: uart@8d00 { + uart_pse_5: uart_pse_5 { compatible = "ns16550"; - reg = ; - reg-shift = <2>; + vendor-id = <0x8086>; + device-id = <0x4b9b>; + reg-shift = <2>; clock-frequency = <1843200>; interrupts = ; interrupt-parent = <&intc>;