boards: arm: nucleo_g474re & b_g474e_dpow1 PM support
Add STM32G4x boards support for Power Management with 2 low power modes: STOP0 and STOP1. LPTIM used as clock source. Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
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2 changed files with 62 additions and 2 deletions
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@ -63,6 +63,27 @@
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};
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};
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power-states {
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stop0: state0 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <1>;
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min-residency-us = <20>;
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};
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stop1: state1 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <2>;
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min-residency-us = <100>;
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};
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};
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cpus {
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cpu@0 {
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cpu-power-states = <&stop0 &stop1>;
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};
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};
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aliases {
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led0 = &blue_led_2;
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led1 = &orange_led_3;
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@ -77,6 +98,10 @@
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};
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};
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&clk_lsi {
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status = "okay";
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};
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&clk_hsi48 {
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status = "okay";
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};
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@ -85,6 +110,12 @@
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status = "okay";
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};
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&lptim1 {
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
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status = "okay";
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};
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&pll {
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div-m = <1>;
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mul-n = <16>;
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@ -105,7 +136,8 @@
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&usart3 {
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pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
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pinctrl-names = "default";
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pinctrl-1 = <&analog_pc10 &analog_pc11>;
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pinctrl-names = "default", "sleep";
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current-speed = <115200>;
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status = "okay";
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};
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@ -45,6 +45,27 @@
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};
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};
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power-states {
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stop0: state0 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <1>;
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min-residency-us = <20>;
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};
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stop1: state1 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <2>;
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min-residency-us = <100>;
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};
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};
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cpus {
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cpu@0 {
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cpu-power-states = <&stop0 &stop1>;
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};
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};
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aliases {
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led0 = &green_led;
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pwm-led0 = &green_pwm_led;
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@ -93,7 +114,8 @@
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&lpuart1 {
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pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
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pinctrl-names = "default";
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pinctrl-1 = <&analog_pa2 &analog_pa3>;
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pinctrl-names = "default", "sleep";
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current-speed = <115200>;
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status = "okay";
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};
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@ -146,6 +168,12 @@
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};
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};
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&lptim1 {
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
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status = "okay";
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};
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&rtc {
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
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<&rcc STM32_SRC_LSI RTC_SEL(2)>;
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