drivers: usb: stm32: Remove HSI48 activation related code
Remove this code to clean up the driver. Clock activation is done from device tree configuration in clock_control driver. Users are informed by warning about missing configuration. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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1 changed files with 0 additions and 42 deletions
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@ -227,29 +227,6 @@ static int usb_dc_stm32_clock_enable(void)
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/* Deprecated: enable HSI48 using device tree */
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/* Deprecated: enable HSI48 using device tree */
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#warning USB device requires HSI48 clock to be enabled using device tree
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#warning USB device requires HSI48 clock to be enabled using device tree
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#endif /* ! STM32_HSI48_ENABLED*/
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#endif /* ! STM32_HSI48_ENABLED*/
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/*
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* In STM32L0 series, HSI48 requires VREFINT and its buffer
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* with 48 MHz RC to be enabled.
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* See ENREF_HSI48 in reference manual RM0367 section10.2.3:
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* "Reference control and status register (SYSCFG_CFGR3)"
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*/
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#ifdef CONFIG_SOC_SERIES_STM32L0X
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if (LL_APB2_GRP1_IsEnabledClock(LL_APB2_GRP1_PERIPH_SYSCFG)) {
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LL_SYSCFG_VREFINT_EnableHSI48();
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} else {
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LOG_ERR("System Configuration Controller clock is "
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"disabled. Unable to enable VREFINT which "
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"is required by HSI48.");
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}
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#endif /* CONFIG_SOC_SERIES_STM32L0X */
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z_stm32_hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
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/* Keeping this sequence for legacy: */
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LL_RCC_HSI48_Enable();
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while (!LL_RCC_HSI48_IsReady()) {
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/* Wait for HSI48 to become ready */
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}
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LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_HSI48);
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LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_HSI48);
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@ -258,13 +235,6 @@ static int usb_dc_stm32_clock_enable(void)
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LL_PWR_EnableVDDUSB();
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LL_PWR_EnableVDDUSB();
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#endif /* CONFIG_SOC_SERIES_STM32U5X */
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#endif /* CONFIG_SOC_SERIES_STM32U5X */
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#if !defined(CONFIG_SOC_SERIES_STM32WBX)
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/* Specially for STM32WB, don't unlock the HSEM to prevent M0 core
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* to disable HSI48 clock used for RNG.
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*/
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z_stm32_hsem_unlock(CFG_HW_CLK48_CONFIG_SEMID);
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#endif /* CONFIG_SOC_SERIES_STM32WBX */
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#elif defined(LL_RCC_USB_CLKSOURCE_NONE)
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#elif defined(LL_RCC_USB_CLKSOURCE_NONE)
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/* When MSI is configured in PLL mode with a 32.768 kHz clock source,
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/* When MSI is configured in PLL mode with a 32.768 kHz clock source,
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* the MSI frequency can be automatically trimmed by hardware to reach
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* the MSI frequency can be automatically trimmed by hardware to reach
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@ -1019,18 +989,6 @@ int usb_dc_detach(void)
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HAL_StatusTypeDef status;
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HAL_StatusTypeDef status;
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int ret;
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int ret;
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#ifdef CONFIG_SOC_SERIES_STM32WBX
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/* Specially for STM32WB, unlock the HSEM when USB is no more used. */
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z_stm32_hsem_unlock(CFG_HW_CLK48_CONFIG_SEMID);
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/*
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* TODO: AN5289 notes a process of locking Sem0, with possible waits
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* via interrupts before switching off CLK48, but lacking any actual
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* examples of that, that remains to be implemented. See
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* https://github.com/zephyrproject-rtos/zephyr/pull/25850
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*/
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#endif /* CONFIG_SOC_SERIES_STM32WBX */
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LOG_DBG("HAL_PCD_DeInit");
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LOG_DBG("HAL_PCD_DeInit");
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status = HAL_PCD_DeInit(&usb_dc_stm32_state.pcd);
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status = HAL_PCD_DeInit(&usb_dc_stm32_state.pcd);
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if (status != HAL_OK) {
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if (status != HAL_OK) {
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