nios2: enable use of global pointer indirect addressing
needs to be 0x8000 after .sdata and .sbss sections since register offsets are 16-bit signed values. Change-Id: Ia7486d32af81e54a6ebac6be7ec308dfdeafe79e Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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96b9425a64
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3 changed files with 43 additions and 27 deletions
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@ -1,9 +1,5 @@
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-include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
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-include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
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# FIXME: Disable use of global pointer for now, this isn't properly set up
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# in our linker script.
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arch_cflags := $(call cc-option,-G0)
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# Put functions and data in their own binary sections so that ld can
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# Put functions and data in their own binary sections so that ld can
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# garbage collect them
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# garbage collect them
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arch_cflags += $(call cc-option,-ffunction-sections) \
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arch_cflags += $(call cc-option,-ffunction-sections) \
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@ -145,9 +145,9 @@ SECTION_FUNC(TEXT, __start)
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/* Align the stack pointer */
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/* Align the stack pointer */
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and sp, sp, r1
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and sp, sp, r1
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/* TODO Setup the global pointer
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/* Initialize global pointer with the linker variable we set */
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* ZEP-272
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movhi gp, %hi(_gp)
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*/
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ori gp, gp, %lo(_gp)
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/* TODO if shadow register sets enabled, interate through them to set
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/* TODO if shadow register sets enabled, interate through them to set
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* up. Need to clear r0, write gp, set the execption stack pointer
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* up. Need to clear r0, write gp, set the execption stack pointer
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@ -182,29 +182,11 @@ SECTIONS
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} GROUP_LINK_IN(RAMABLE_REGION)
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} GROUP_LINK_IN(RAMABLE_REGION)
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#endif
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#endif
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SECTION_PROLOGUE(_DATA_SECTION_NAME,,)
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SECTION_PROLOGUE(initlevel, (OPTIONAL),)
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{
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{
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#ifndef CONFIG_XIP
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#ifndef CONFIG_XIP
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_image_ram_start = .;
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_image_ram_start = .;
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#endif
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#endif
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*(.data)
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*(".data.*")
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KEEP(*(.isr_irq*))
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/* sections for IRQ0-9 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9])))
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/* sections for IRQ10-99 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9])))
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/* sections for IRQ100-999 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9][0-9])))
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(initlevel, (OPTIONAL),)
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{
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DEVICE_INIT_SECTIONS()
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DEVICE_INIT_SECTIONS()
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} GROUP_LINK_IN(RAMABLE_REGION)
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} GROUP_LINK_IN(RAMABLE_REGION)
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@ -255,6 +237,43 @@ SECTIONS
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_k_event_list_end = .;
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_k_event_list_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(_DATA_SECTION_NAME,,)
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{
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KEEP(*(.isr_irq*))
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/* sections for IRQ0-9 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9])))
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/* sections for IRQ10-99 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9])))
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/* sections for IRQ100-999 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9][0-9])))
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*(.data)
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*(".data.*")
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/* the Nios2 architecture only has 16-bit signed immediate offsets in
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* the instructions, so accessing a general address requires typically
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* three instructions – basically, two for the two halves of the 32-bit
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* address, and one to merge them – but if we can put the most commonly
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* accessed globals in a special 64K span of memory addressed by the GP
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* register, then we can access those values in a single instruction,
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* saving both codespace and runtime.
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*
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* Since these immediate offsets are signed, place gp 0x8000 past the
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* beginning of .sdata so that we can use both positive and negative
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* offsets.
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*/
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_gp = ABSOLUTE(. + 0x8000);
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PROVIDE(gp = _gp);
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*(.sdata .sdata.* .gnu.linkonce.s.*)
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*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
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} GROUP_LINK_IN(RAMABLE_REGION)
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__data_ram_end = .;
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__data_ram_end = .;
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SECTION_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
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SECTION_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
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@ -265,8 +284,9 @@ SECTIONS
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*/
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*/
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. = ALIGN(4);
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. = ALIGN(4);
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__bss_start = .;
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__bss_start = .;
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*(.bss)
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*(.sbss)
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*(.sbss)
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*(".sbss.*")
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*(.bss)
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*(".bss.*")
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*(".bss.*")
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COMMON_SYMBOLS
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COMMON_SYMBOLS
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/*
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/*
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