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drivers: pinctrl: Add kinetis pinctrl driver

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Add kinetis pinctrl driver. Driver initializes clocks for each port, and
exposes the pinctrl_configure_pins function required for pinctrl
support.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-02-21 12:54:05 -06:00 • committed by David Leach
commit fc8877187e
4 changed files with 95 additions and 0 deletions
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1
drivers/pinctrl/CMakeLists.txt
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@ -10,3 +10,4 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_NRF pinctrl_nrf.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RCAR_PFC pfc_rcar.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_STM32 pinctrl_stm32.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_KINETIS pinctrl_kinetis.c)

1
drivers/pinctrl/Kconfig
View file

@ -35,5 +35,6 @@ source "drivers/pinctrl/Kconfig.nrf"
source "drivers/pinctrl/Kconfig.rcar"
source "drivers/pinctrl/Kconfig.rpi_pico"
source "drivers/pinctrl/Kconfig.stm32"
source "drivers/pinctrl/Kconfig.kinetis"
endif # PINCTRL

11
drivers/pinctrl/Kconfig.kinetis Normal file
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@ -0,0 +1,11 @@
# Copyright (c) 2022 NXP
# SPDX-License-Identifier: Apache-2.0
DT_COMPAT_NXP_KINETIS_PINCTRL := nxp,kinetis-pinctrl
config PINCTRL_NXP_KINETIS
bool "Pin controller driver for NXP Kinetis MCUs"
depends on SOC_FAMILY_KINETIS
default $(dt_compat_enabled,$(DT_COMPAT_NXP_KINETIS_PINCTRL))
help
Enable pin controller driver for NXP Kinetis MCUs

82
drivers/pinctrl/pinctrl_kinetis.c Normal file
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@ -0,0 +1,82 @@
/*
* Copyright (c) 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_pinmux
#include <drivers/pinctrl.h>
#include <fsl_clock.h>
/* Port register addresses. */
static PORT_Type *ports[] = {
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(porta)),
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(portb)),
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(portc)),
#if DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 5
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(portd)),
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(porte)),
#endif
};
#define PIN(mux) (((mux) & 0xFC00000) >> 22)
#define PORT(mux) (((mux) & 0xF0000000) >> 28)
#define PINCFG(mux) ((mux) & Z_PINCTRL_KINETIS_PCR_MASK)
struct pinctrl_mcux_config {
clock_ip_name_t clock_ip_name;
};
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
uintptr_t reg)
{
for (uint8_t i = 0; i < pin_cnt; i++) {
PORT_Type *base = ports[PORT(pins[i])];
uint8_t pin = PIN(pins[i]);
uint16_t mux = PINCFG(pins[i]);
base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_KINETIS_PCR_MASK)) | mux;
}
return 0;
}
/* Kinetis pinmux driver binds to the same DTS nodes,
* and handles clock init. Only bind to these nodes if pinmux driver
* is disabled.
*/
#ifndef CONFIG_PINMUX
static int pinctrl_mcux_init(const struct device *dev)
{
const struct pinctrl_mcux_config *config = dev->config;
CLOCK_EnableClock(config->clock_ip_name);
return 0;
}
#if DT_NODE_HAS_STATUS(DT_INST(0, nxp_kinetis_ke1xf_sim), okay)
#define INST_DT_CLOCK_IP_NAME(n) \
DT_REG_ADDR(DT_INST_PHANDLE(n, clocks)) + DT_INST_CLOCKS_CELL(n, name)
#else
#define INST_DT_CLOCK_IP_NAME(n) \
CLK_GATE_DEFINE(DT_INST_CLOCKS_CELL(n, offset), \
DT_INST_CLOCKS_CELL(n, bits))
#endif
#define PINCTRL_MCUX_INIT(n) \
static const struct pinctrl_mcux_config pinctrl_mcux_##n##_config = {\
.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \
}; \
\
DEVICE_DT_INST_DEFINE(n, \
&pinctrl_mcux_init, \
NULL, \
NULL, &pinctrl_mcux_##n##_config, \
PRE_KERNEL_1, \
0, \
NULL);
DT_INST_FOREACH_STATUS_OKAY(PINCTRL_MCUX_INIT)
#endif