boards: Add support for nucleo_h7a3zi_q

Introduce this board, rcc config: the SoC uses slightly different
domain naming, eg: `cdppre` is equivalent to `d1ppre`
D1 = CD
D2 = CD<..>2
D3 = SRD

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>

boards/arm/nucleo_h7a3zi_q/Kconfig.board

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+# STM32H7A3ZI-Q Nucleo board configuration
+
+# Copyright (c) 2021 Electrolance Solutions
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NUCLEO_H7A3ZI_Q
+	bool "Nucleo H75A3ZI-Q Development Board"
+	depends on SOC_STM32H7A3XXQ

boards/arm/nucleo_h7a3zi_q/Kconfig.defconfig

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+# STM32H7A3ZI-Q Nucleo board configuration
+
+# Copyright (c) 2021 Electrolance Solutions
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_NUCLEO_H7A3ZI_Q
+
+config BOARD
+	default "nucleo_h7a3zi_q"
+
+endif # BOARD_NUCLEO_H7A3ZI_Q

boards/arm/nucleo_h7a3zi_q/arduino_r3_connector.dtsi

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+/*
+ * Copyright (c) 2021 Electrolance Solutions
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	arduino_header: connector {
+		compatible = "arduino-header-r3";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpioa 3 0>,	/* A0 */
+			   <1 0 &gpioc 0 0>,	/* A1 */
+			   <2 0 &gpioc 3 0>,	/* A2 */
+			   <3 0 &gpiob 1 0>,	/* A3 */
+			   <4 0 &gpioc 2 0>,	/* A4 */
+			   <5 0 &gpiof 11 0>,	/* A5 */
+			   <6 0 &gpiob 7 0>,	/* D0 */
+			   <7 0 &gpiob 6 0>,	/* D1 */
+			   <8 0 &gpiog 14 0>,	/* D2 */
+			   <9 0 &gpioe 13 0>,	/* D3 */
+			   <10 0 &gpioe 14 0>,	/* D4 */
+			   <11 0 &gpioe 11 0>,	/* D5 */
+			   <12 0 &gpioa 8 0>,	/* D6 */
+			   <13 0 &gpiog 12 0>,	/* D7 */
+			   <14 0 &gpiog 9 0>,	/* D8 */
+			   <15 0 &gpiod 15 0>,	/* D9 */
+			   <16 0 &gpiod 14 0>,	/* D10 */
+			   <17 0 &gpioa 7 0>,	/* D11 */
+			   <18 0 &gpioa 6 0>,	/* D12 */
+			   <19 0 &gpioa 5 0>,	/* D13 */
+			   <20 0 &gpiob 9 0>,	/* D14 */
+			   <21 0 &gpiob 8 0>;	/* D15 */
+	};
+};

boards/arm/nucleo_h7a3zi_q/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=STM32H7A3ZI" "--speed=4000")
+board_runner_args(stm32cubeprogrammer "--port=swd" "--reset=hw")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)

boards/arm/nucleo_h7a3zi_q/doc/index.rst

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+.. _nucleo_h7a3zi_q_board:
+
+ST Nucleo H7A3ZI-Q
+##################
+
+Overview
+********
+
+The STM32 Nucleo-144 boards offer combinations of performance and power that
+provide an affordable and flexible way for users to build prototypes and try
+out new concepts. For compatible boards, the SMPS (Switched-Mode Power Supply)
+significantly reduces power consumption in Run mode.
+
+The Arduino-compatible ST Zio connector expands functionality of the Nucleo
+open development platform, with a wide choice of specialized Arduino* Uno V3
+shields.
+
+The STM32 Nucleo-144 board does not require any separate probe as it integrates
+the ST-LINK/V3E debugger/programmer.
+
+The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
+libraries and examples available with the STM32Cube MCU Package.
+
+Key Features
+
+- STM32 microcontroller in LQFP144 package
+- USB OTG or full-speed device (depending on STM32 support)
+- 3 user LEDs
+- 2 user and reset push-buttons
+- 32.768 kHz crystal oscillator
+- Board connectors:
+
+ - USB with Micro-AB
+ - SWD
+ - ST Zio connector including Arduino* Uno V3
+ - ST morpho
+
+- Flexible power-supply options: ST-LINK USB VBUS or external sources.
+- On-board ST-LINK/V3E debugger/programmer with USB re-enumeration
+- capability: mass storage, virtual COM port and debug port.
+- Comprehensive free software libraries and examples available with the
+  STM32Cube MCU package.
+- Arm* Mbed Enabled* compliant (only for some Nucleo part numbers)
+
+.. image:: img/nucleo_h7a3zi_q.jpg
+   :width: 1000px
+   :align: center
+   :height: 1498px
+   :alt: Nucleo H7A3ZI-Q
+
+More information about the board can be found at the `Nucleo H7A3ZI-Q website`_.
+
+Hardware
+********
+
+Nucleo H7A3ZI-Q provides the following hardware components:
+
+- STM32H7A3ZI in LQFP144 package
+- ARM 32-bit Cortex-M7 CPU with FPU
+- Chrom-ART Accelerator
+- Hardware JPEG Codec
+- 280 MHz max CPU frequency
+- VDD from 1.62 V to 3.6 V
+- 2 MB Flash
+- ~1.4 Mbytes SRAM
+- 32-bit timers(2)
+- 16-bit timers(15)
+- SPI(6)
+- I2C(4)
+- I2S (3)
+- USART(5)
+- UART(5)
+- USB OTG Full Speed and High Speed(1)
+- USB OTG Full Speed(1)
+- CAN-FD(2)
+- SAI(2)
+- SPDIF_Rx(4)
+- HDMI_CEC(1)
+- Dual Mode Quad SPI(1)
+- Camera Interface
+- GPIO (up to 114) with external interrupt capability
+- 16-bit ADC(2) with 24 channels / 3.6 MSPS
+- 12-bit DAC with 1/2 channels(2)
+- True Random Number Generator (RNG)
+- 16-channel DMA
+- LCD-TFT Controller with XGA resolution
+
+Supported Features
+==================
+
+The Zephyr nucleo_h7a3zi_q board configuration supports the following hardware
+features:
+
++-------------+------------+------------------------------------+
+| Interface   | Controller | Driver/Component                   |
++=============+============+====================================+
+| NVIC        | on-chip    | nested vector interrupt controller |
++-------------+------------+------------------------------------+
+| UART        | on-chip    | serial port                        |
++-------------+------------+------------------------------------+
+| PINMUX      | on-chip    | pinmux                             |
++-------------+------------+------------------------------------+
+| GPIO        | on-chip    | gpio                               |
++-------------+------------+------------------------------------+
+| PWM         | on-chip    | pwm                                |
++-------------+------------+------------------------------------+
+| ADC         | on-chip    | adc                                |
++-------------+------------+------------------------------------+
+| Backup SRAM | on-chip    | Backup SRAM                        |
++-------------+------------+------------------------------------+
+
+
+
+Other hardware features are not yet supported on this Zephyr port.
+
+The default configuration can be found in the defconfig file:
+``boards/arm/nucleo_h7a3zi_q/nucleo_h7a3zi_q_defconfig``
+
+For mode details please refer to `STM32 Nucleo-144 board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+The Nucleo H7A3ZI-Q board features a ST Zio connector (extended Arduino Uno V3)
+and a ST morpho connector. Board is configured as follows:
+
+- USART3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
+- USER_PB : PC13
+- LD1 : PB0
+- LD2 : PE1
+- LD3 : PB14
+- ADC1_INP15 : PA3 (Arduino analog, A0)
+
+System Clock
+------------
+
+Nucleo H7A3ZI-Q System Clock could be driven by an internal or external
+oscillator, as well as the main PLL clock. By default, the System clock is
+driven by the PLL clock at 96MHz, driven by an 8MHz high-speed external clock.
+
+Serial Port
+-----------
+
+Nucleo H7A3ZI-Q board has 4 UARTs and 4 USARTs. The Zephyr console output is
+assigned to USART3. Default settings are 115200 8N1.
+
+Programming and Debugging
+*************************
+
+Applications for the ``nucleo_h7a3zi_q`` board configuration can be built and
+flashed in the usual way (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Flashing
+========
+
+Nucleo H7A3ZI-Q board includes an ST-LINK/V3E embedded debug tool interface.
+
+Flashing an application to Nucleo H7A3ZI-Q
+------------------------------------------
+
+Here is an example for the :ref:`hello_world` application.
+
+Run a serial host program to connect with your Nucleo board.
+
+.. code-block:: console
+
+   $ minicom -b 115200 -D /dev/ttyACM0
+
+Build and flash the application:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: nucleo_h7a3zi_q
+   :goals: build flash
+
+You should see the following message on the console:
+
+.. code-block:: console
+
+   $ Hello World! nucleo_h7a3zi_q
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: nucleo_h7a3zi_q
+   :maybe-skip-config:
+   :goals: debug
+
+.. _Nucleo H7A3ZI-Q website:
+   https://www.st.com/en/evaluation-tools/nucleo-h7a3zi-q.html#overview
+
+.. _STM32 Nucleo-144 board User Manual:
+   https://www.st.com/resource/en/user_manual/um2408-stm32h7-nucleo144-boards-mb1363-stmicroelectronics.pdf
+
+.. _STM32H7A3ZI-Q on www.st.com:
+   https://www.st.com/en/microcontrollers-microprocessors/stm32h7a3zi.html
+
+.. _STM32H7A3ZI-Q reference manual:
+   https://www.st.com/resource/en/reference_manual/rm0455-stm32h7a37b3-and-stm32h7b0-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

boards/arm/nucleo_h7a3zi_q/nucleo_h7a3zi_q.dts

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+/*
+ * Copyright (c) 2021 Electrolance Solutions
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/h7/stm32h7a3Xi.dtsi>
+#include <st/h7/stm32h7a3z(g-i)txq-pinctrl.dtsi>
+#include "arduino_r3_connector.dtsi"
+
+/ {
+	model = "STMicroelectronics STM32H7A3ZI-Q-NUCLEO board";
+	compatible = "st,stm32h7a3zi-q-nucleo";
+
+	chosen {
+		zephyr,console = &usart3;
+		zephyr,shell-uart = &usart3;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,dtcm = &dtcm;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		green_led: led_0 {
+			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
+			label = "User LD1";
+		};
+		yellow_led: led_1 {
+			gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
+			label = "User LD2";
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+
+		red_pwm_led: red_pwm_led {
+			pwms = <&pwm12 1 4 PWM_POLARITY_NORMAL>;
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button: button_0 {
+			label = "User";
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	aliases {
+		led0 = &green_led;
+		led1 = &yellow_led;
+		pwm-led0 = &red_pwm_led;
+		sw0 = &user_button;
+	};
+};
+
+&clk_hse {
+	hse-bypass;
+	clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
+	status = "okay";
+};
+
+&pll {
+	div-m = <1>;
+	mul-n = <24>;
+	div-p = <2>;
+	div-q = <4>;
+	div-r = <2>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(96)>;
+	d1cpre = <1>;
+	hpre = <1>;
+	d1ppre = <2>;
+	d2ppre1 = <2>;
+	d2ppre2 = <2>;
+	d3ppre = <2>;
+};
+
+&usart3 {
+	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&backup_sram {
+	status = "okay";
+};
+
+&timers12 {
+	st,prescaler = <10000>;
+	status = "okay";
+
+	pwm12: pwm {
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&tim12_ch1_pb14>;
+	};
+};
+
+&adc1 {
+	pinctrl-0 = <&adc1_inp15_pa3>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/arm/nucleo_h7a3zi_q/nucleo_h7a3zi_q.yaml

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+identifier: nucleo_h7a3zi_q
+name: ST Nucleo H7A3ZI-Q
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 1280
+flash: 2048
+supported:
+  - arduino_gpio
+  - uart
+  - gpio
+  - pwm
+  - adc
+  - backup_sram

boards/arm/nucleo_h7a3zi_q/nucleo_h7a3zi_q_defconfig

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+# Copyright (c) 2021 Electrolance Solutions
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_STM32H7X=y
+CONFIG_SOC_STM32H7A3XXQ=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable UART
+CONFIG_SERIAL=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable Pinctrl
+CONFIG_PINCTRL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable clocks
+CONFIG_CLOCK_CONTROL=y

boards/arm/nucleo_h7a3zi_q/support/openocd.cfg

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+source [find interface/stlink-dap.cfg]
+transport select dapdirect_swd
+
+set WORKAREASIZE 0x3000
+set CHIPNAME STM32H7A3ZI
+set BOARDNAME NUCLEO-H7A3ZI_Q
+
+source [find target/stm32h7x.cfg]
+
+# Use connect_assert_srst here to be able to program
+# even when core is in sleep mode
+reset_config srst_only srst_nogate connect_assert_srst
+
+$_CHIPNAME.cpu0 configure -event gdb-attach {
+        echo "Debugger attaching: halting execution"
+        gdb_breakpoint_override hard
+}
+
+$_CHIPNAME.cpu0 configure -event gdb-detach {
+        echo "Debugger detaching: resuming execution"
+        resume
+}
+
+# Due to the use of connect_assert_srst, running gdb requires
+# to reset halt just after openocd init.
+rename init old_init
+proc init {} {
+        old_init
+        reset halt
+}