ARM: nrf52: Power Management for nrf52 series SOC

Add support for nrf52 series SOC. This patch Adds :-
1. Architecture specific Power Management APIs.
2. APIs for invoking various Power Management tasks into nrf52.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
This commit is contained in:
Youvedeep Singh 2017-10-05 17:57:38 +05:30 committed by Anas Nashif
commit fc78ddf7d3
5 changed files with 145 additions and 1 deletions

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@ -16,6 +16,7 @@ config SOC_SERIES_NRF52X
select CLOCK_CONTROL
select CLOCK_CONTROL_NRF5
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_DEEP_SLEEP_SUPPORTED
select XIP
select HAS_CMSIS
select HAS_NORDIC_MDK

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@ -10,6 +10,7 @@ soc-cflags += -DNRF52840_XXAA
endif
obj-y += soc.o
obj-$(CONFIG_SYS_POWER_MANAGEMENT) += power.o
obj-$(CONFIG_ARM_MPU_NRF52X) += mpu_regions.o
zephyr: $(KERNEL_HEX_NAME)

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@ -0,0 +1,104 @@
/*
* Copyright (c) 2017 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define SYS_LOG_LEVEL SYS_LOG_LEVEL_DEBUG
#include <logging/sys_log.h>
#include <zephyr.h>
#include <soc_power.h>
#include <nrf_power.h>
extern void nrf_gpiote_clear_port_event(void);
#if defined(CONFIG_SYS_POWER_DEEP_SLEEP)
/* System_OFF is deepest Power state available, On exiting from this
* state CPU including all peripherals reset
*/
static void _system_off(void)
{
nrf_power_system_off();
}
#endif
static void _issue_low_power_command(void)
{
__WFE();
__SEV();
__WFE();
}
/* Name: _low_power_mode
* Parameter : Low Power Task ID
*
* Set Notdic SOC specific Low Power Task and invoke
* _WFE event to put the nordic SOC into Low Power State.
*/
static void _low_power_mode(enum power_states state)
{
switch (state) {
/* CONSTANT LATENCY TASK */
case SYS_POWER_STATE_CPU_LPS:
nrf_power_task_trigger(NRF_POWER_TASK_CONSTLAT);
break;
/* LOW POWER TASK */
case SYS_POWER_STATE_CPU_LPS_1:
nrf_power_task_trigger(NRF_POWER_TASK_LOWPWR);
break;
default:
/* Unsupported State */
SYS_LOG_ERR("Unsupported State\n");
break;
}
/* Issue __WFE*/
_issue_low_power_command();
/* Clear the Port Event */
nrf_gpiote_clear_port_event();
}
/* Invoke Low Power/System Off specific Tasks */
void _sys_soc_set_power_state(enum power_states state)
{
switch (state) {
case SYS_POWER_STATE_CPU_LPS:
_low_power_mode(SYS_POWER_STATE_CPU_LPS);
break;
case SYS_POWER_STATE_CPU_LPS_1:
_low_power_mode(SYS_POWER_STATE_CPU_LPS_1);
break;
#if defined(CONFIG_SYS_POWER_DEEP_SLEEP)
case SYS_POWER_STATE_DEEP_SLEEP:
_system_off();
break;
#endif
default:
/* Unsupported State */
SYS_LOG_ERR("Unsupported State\n");
break;
}
}
/* Handle SOC specific activity after Low Power Mode Exit */
void _sys_soc_power_state_post_ops(enum power_states state)
{
/* This is placeholder for nrf52 SOC specific task.
* Currently there is no nrf52 SOC specific activity to perform.
*/
switch (state) {
case SYS_POWER_STATE_CPU_LPS:
break;
case SYS_POWER_STATE_CPU_LPS_1:
break;
#if defined(CONFIG_SYS_POWER_DEEP_SLEEP)
case SYS_POWER_STATE_DEEP_SLEEP:
break;
#endif
default:
/* Unsupported State */
SYS_LOG_ERR("Unsupported State\n");
break;
}
}

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@ -0,0 +1,39 @@
/*
* Copyright (c) 2017 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_POWER_H_
#define _SOC_POWER_H_
#ifdef __cplusplus
extern "C" {
#endif
enum power_states {
SYS_POWER_STATE_CPU_LPS, /* CONSTLAT Task Activited */
SYS_POWER_STATE_CPU_LPS_1, /* LOWPWR Task Activated */
SYS_POWER_STATE_CPU_LPS_2, /* Not supported*/
SYS_POWER_STATE_DEEP_SLEEP, /* System Off */
SYS_POWER_STATE_DEEP_SLEEP_1, /* Not Supported */
SYS_POWER_STATE_DEEP_SLEEP_2, /* Not Supported */
SYS_POWER_STATE_MAX /* Do nothing */
};
/**
* @brief Put processor into low power state
*/
void _sys_soc_set_power_state(enum power_states state);
/**
* @brief Do any SoC or architecture specific post ops after low power states.
*/
void _sys_soc_power_state_post_ops(enum power_states state);
#ifdef __cplusplus
}
#endif
#endif /* _SOC_POWER_H_ */

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@ -40,7 +40,6 @@
* Hardware access layer for (POWER) peripheral.
*/
#include "nrf.h"
#include "nordic_common.h"
#include "nrf_assert.h"
#include <stdint.h>
#include <stddef.h>