diff --git a/drivers/i2c/Kconfig.stm32 b/drivers/i2c/Kconfig.stm32
index 78ce59f31e8..80fd0f03cb5 100644
--- a/drivers/i2c/Kconfig.stm32
+++ b/drivers/i2c/Kconfig.stm32
@@ -20,12 +20,12 @@ config I2C_STM32_V1
 
 config I2C_STM32_V2
 	bool
-	depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32MP1X || SOC_SERIES_STM32G4X
+	depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32MP1X || SOC_SERIES_STM32G0X || SOC_SERIES_STM32G4X
 	select USE_STM32_LL_I2C
 	select USE_STM32_LL_RCC if SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
 	select I2C_STM32_INTERRUPT if I2C_SLAVE
 	help
-	  Enable I2C support on the STM32 F0, F3, F7, L4, WBX, MP1 and G4 family of
+	  Enable I2C support on the STM32 F0, F3, F7, L4, WBX, MP1, G0 and G4 family of
 	  processors.
 	  This driver also supports the L0 series.
 	  If I2C_SLAVE is enabled it selects I2C_STM32_INTERRUPT, since slave mode
@@ -40,6 +40,6 @@ config I2C_STM32_INTERRUPT
 config I2C_STM32_COMBINED_INTERRUPT
 	bool
 	depends on I2C_STM32_INTERRUPT
-	default y if SOC_SERIES_STM32F0X || SOC_SERIES_STM32L0X
+	default y if SOC_SERIES_STM32F0X || SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X
 
 endif # I2C_STM32
diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi
index 577dd0272a6..d03f9839de1 100644
--- a/dts/arm/st/g0/stm32g0.dtsi
+++ b/dts/arm/st/g0/stm32g0.dtsi
@@ -9,6 +9,7 @@
 #include <arm/armv6-m.dtsi>
 #include <dt-bindings/clock/stm32_clock.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/i2c/i2c.h>
 
 / {
 	cpus {
@@ -147,6 +148,31 @@
 			};
 		};
 
+		i2c1: i2c@40005400 {
+			compatible = "st,stm32-i2c-v2";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40005400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
+			interrupts = <23 0>;
+			interrupt-names = "combined";
+			status = "disabled";
+			label = "I2C_1";
+		};
+
+		i2c2: i2c@40005800 {
+			compatible = "st,stm32-i2c-v2";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40005800 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
+			interrupts = <24 0>;
+			interrupt-names = "combined";
+			status = "disabled";
+			label = "I2C_2";
+		};
 	};
 };
 
diff --git a/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series b/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series
index 14a4fd54ef2..b7a80859417 100644
--- a/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series
+++ b/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series
@@ -21,6 +21,13 @@ config GPIO_STM32_PORTD
 config GPIO_STM32_PORTF
 	default y
 
+if I2C_STM32
+
+config I2C_STM32_V2
+	default y
+
+endif # I2C_STM32
+
 endif # GPIO_STM32
 
 endif # SOC_SERIES_STM32G0X
diff --git a/soc/arm/st_stm32/stm32g0/dts_fixup.h b/soc/arm/st_stm32/stm32g0/dts_fixup.h
index 161e837775f..ffc3dd9fb29 100644
--- a/soc/arm/st_stm32/stm32g0/dts_fixup.h
+++ b/soc/arm/st_stm32/stm32g0/dts_fixup.h
@@ -63,6 +63,22 @@
 
 /* there is no reference to GPIOE, GPIOG and GPIOH in the dts files */
 
+#define DT_I2C_1_BASE_ADDRESS			DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
+#define DT_I2C_1_COMBINED_IRQ_PRI		DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
+#define DT_I2C_1_NAME				DT_ST_STM32_I2C_V2_40005400_LABEL
+#define DT_I2C_1_COMBINED_IRQ			DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
+#define DT_I2C_1_BITRATE			DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
+#define DT_I2C_1_CLOCK_BITS			DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
+#define DT_I2C_1_CLOCK_BUS			DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
+
+#define DT_I2C_2_BASE_ADDRESS			DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
+#define DT_I2C_2_COMBINED_IRQ_PRI		DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
+#define DT_I2C_2_NAME				DT_ST_STM32_I2C_V2_40005800_LABEL
+#define DT_I2C_2_COMBINED_IRQ			DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
+#define DT_I2C_2_BITRATE			DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
+#define DT_I2C_2_CLOCK_BITS			DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
+#define DT_I2C_2_CLOCK_BUS			DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
+
 #define DT_UART_STM32_USART_1_BASE_ADDRESS	DT_ST_STM32_USART_40013800_BASE_ADDRESS
 #define DT_UART_STM32_USART_1_BAUD_RATE		DT_ST_STM32_USART_40013800_CURRENT_SPEED
 #define DT_UART_STM32_USART_1_IRQ_PRI		DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
diff --git a/soc/arm/st_stm32/stm32g0/soc.h b/soc/arm/st_stm32/stm32g0/soc.h
index 9eb60a23271..b49921ac341 100644
--- a/soc/arm/st_stm32/stm32g0/soc.h
+++ b/soc/arm/st_stm32/stm32g0/soc.h
@@ -40,6 +40,10 @@
 #include <stm32g0xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_I2C
+#include <stm32g0xx_ll_i2c.h>
+#endif
+
 #ifdef CONFIG_WWDG_STM32
 #include <stm32g0xx_ll_wwdg.h>
 #endif