diff --git a/dts/arm/armv6-m.dtsi b/dts/arm/armv6-m.dtsi
index 3e8b30ca190..cdf25c7d348 100644
--- a/dts/arm/armv6-m.dtsi
+++ b/dts/arm/armv6-m.dtsi
@@ -9,7 +9,7 @@
 		ranges;
 
 		nvic: interrupt-controller@e000e100  {
-			compatible = "arm,armv6m-nvic";
+			compatible = "arm,nvic";
 			reg = <0xe000e100 0xc00>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
diff --git a/dts/arm/armv7-m.dtsi b/dts/arm/armv7-m.dtsi
index e1be2ed0531..9937ad43597 100644
--- a/dts/arm/armv7-m.dtsi
+++ b/dts/arm/armv7-m.dtsi
@@ -9,7 +9,7 @@
 		ranges;
 
 		nvic: interrupt-controller@e000e100  {
-			compatible = "arm,armv7m-nvic";
+			compatible = "arm,nvic";
 			reg = <0xe000e100 0xc00>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
diff --git a/dts/arm/cc3200_launchxl.fixup b/dts/arm/cc3200_launchxl.fixup
index e92cd6aeab1..6b50c357c39 100644
--- a/dts/arm/cc3200_launchxl.fixup
+++ b/dts/arm/cc3200_launchxl.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define EXCEPTION_UARTA0		TI_CC32XX_UART_4000C000_IRQ_0
 #define CONFIG_UART_CC32XX_IRQ_PRI	TI_CC32XX_UART_4000C000_IRQ_0_PRIORITY
diff --git a/dts/arm/frdm_k64f.fixup b/dts/arm/frdm_k64f.fixup
index d38f5609fcc..352faf0bad0 100644
--- a/dts/arm/frdm_k64f.fixup
+++ b/dts/arm/frdm_k64f.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CONFIG_UART_MCUX_0_BAUD_RATE	NXP_K64F_UART_4006A000_BAUD_RATE
 #define CONFIG_UART_MCUX_0_IRQ_PRI	NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
diff --git a/dts/arm/frdm_kw41z.fixup b/dts/arm/frdm_kw41z.fixup
index 90e32cb60e3..b216889afa1 100644
--- a/dts/arm/frdm_kw41z.fixup
+++ b/dts/arm/frdm_kw41z.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS		ARM_ARMV6M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS		ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE	NXP_KW41Z_LPUART_40054000_BAUD_RATE
 #define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI	NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY
diff --git a/dts/arm/hexiwear_k64.fixup b/dts/arm/hexiwear_k64.fixup
index d38f5609fcc..352faf0bad0 100644
--- a/dts/arm/hexiwear_k64.fixup
+++ b/dts/arm/hexiwear_k64.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CONFIG_UART_MCUX_0_BAUD_RATE	NXP_K64F_UART_4006A000_BAUD_RATE
 #define CONFIG_UART_MCUX_0_IRQ_PRI	NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
diff --git a/dts/arm/nucleo_l476rg.fixup b/dts/arm/nucleo_l476rg.fixup
index 37425ebbb26..18908745fd9 100644
--- a/dts/arm/nucleo_l476rg.fixup
+++ b/dts/arm/nucleo_l476rg.fixup
@@ -4,7 +4,7 @@
  * generated data matches the driver definitions.
  */
 
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
 #define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_BAUD_RATE
diff --git a/dts/arm/olimexino_stm32.fixup b/dts/arm/olimexino_stm32.fixup
index e944f021ae1..e004aeb117a 100644
--- a/dts/arm/olimexino_stm32.fixup
+++ b/dts/arm/olimexino_stm32.fixup
@@ -5,7 +5,7 @@
  */
 
 
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
 #define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_BAUD_RATE
diff --git a/dts/arm/v2m_beetle.fixup b/dts/arm/v2m_beetle.fixup
index c01729d6a9e..1cf1b9e070b 100644
--- a/dts/arm/v2m_beetle.fixup
+++ b/dts/arm/v2m_beetle.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_ARMV7M_NVIC_E000E100_NUM_IRQ_PRIO_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_NUM_IRQ_PRIO_BITS
 
 #define CMSDK_APB_UART_0_IRQ			ARM_CMSDK_UART_40004000_IRQ_0
 #define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI	ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
diff --git a/dts/arm/yaml/arm,nvic.yaml b/dts/arm/yaml/arm,nvic.yaml
new file mode 100644
index 00000000000..eaa68298609
--- /dev/null
+++ b/dts/arm/yaml/arm,nvic.yaml
@@ -0,0 +1,32 @@
+---
+title: ARM Cortex-M NVIC Interrupt Controller
+version: 0.1
+
+description: >
+    This binding describes the ARM Cortex-M NVIC IRQ controller
+
+properties:
+  - compatible:
+      category: required
+      type: string
+      description: compatible strings
+      constraint: "arm,nvic"
+
+  - reg:
+      category: required
+      type: int
+      description: mmio register space
+      generation: define
+
+  - num-irq-prio-bits:
+      category: required
+      type: int
+      description: number of bits of IRQ priorities
+      generation: define
+
+cell_string: IRQ
+
+"#cells":
+  - irq
+  - priority
+...
diff --git a/dts/arm/yaml/arm,armv6m-nvic.yaml b/dts/arm/yaml/arm,v6m-nvic.yaml
similarity index 94%
rename from dts/arm/yaml/arm,armv6m-nvic.yaml
rename to dts/arm/yaml/arm,v6m-nvic.yaml
index c384130e0dd..b531b68af14 100644
--- a/dts/arm/yaml/arm,armv6m-nvic.yaml
+++ b/dts/arm/yaml/arm,v6m-nvic.yaml
@@ -10,7 +10,7 @@ properties:
       category: required
       type: string
       description: compatible strings
-      constraint: "arm,armv6m-nvic"
+      constraint: "arm,v6m-nvic"
 
   - reg:
       category: required
diff --git a/dts/arm/yaml/arm_cortex_m4_nvic.yaml b/dts/arm/yaml/arm,v7m-nvic.yaml
similarity index 94%
rename from dts/arm/yaml/arm_cortex_m4_nvic.yaml
rename to dts/arm/yaml/arm,v7m-nvic.yaml
index 58bbe35597a..8f910fb92e7 100644
--- a/dts/arm/yaml/arm_cortex_m4_nvic.yaml
+++ b/dts/arm/yaml/arm,v7m-nvic.yaml
@@ -10,7 +10,7 @@ properties:
       category: required
       type: string
       description: compatible strings
-      constraint: "arm,armv7m-nvic"
+      constraint: "arm,v7m-nvic"
 
   - reg:
       category: required