drivers: timer: update TIMER_IRQ for tests/kernel/context
This test has gotten out of control. It has a giant #if cascade enumerating every timer driver in the Zephyr tree and extracting its interrupt number. Which means that every driver needs to somehow expose that interrupt in its platform headers or some other API. Make it a simple integer variable exported by the timer driver for the benefit of this one test. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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2 changed files with 9 additions and 5 deletions
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@ -41,6 +41,8 @@ BUILD_ASSERT(COMPARATOR_IDX >= 0 && COMPARATOR_IDX <= 1);
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static struct k_spinlock lock;
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static uint64_t last_count;
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const int32_t z_sys_timer_irq_for_test = TIMER_IRQ; /* See tests/kernel/context */
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static void set_compare(uint64_t time)
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{
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/* Disarm the comparator to prevent spurious triggers */
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@ -56,9 +56,6 @@
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#elif defined(CONFIG_XTENSA_TIMER)
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#define TICK_IRQ UTIL_CAT(XCHAL_TIMER, \
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UTIL_CAT(CONFIG_XTENSA_TIMER_ID, _INTERRUPT))
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#elif defined(CONFIG_CAVS_TIMER)
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#define TICK_IRQ DSP_WCT_IRQ(0)
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#elif defined(CONFIG_ALTERA_AVALON_TIMER)
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#define TICK_IRQ TIMER_0_IRQ
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#elif defined(CONFIG_ARCV2_TIMER)
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@ -94,8 +91,13 @@
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*/
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#endif /* defined(CONFIG_ARCH_POSIX) */
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#else
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/* generate an error */
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#error Timer type is not defined for this platform
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/* Ooooooph. All that is a mess. Here's the new API to be portably
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* supported by timer drivers:
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*/
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extern int32_t z_sys_timer_irq_for_test;
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#define TICK_IRQ (z_sys_timer_irq_for_test)
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#endif
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/* Cortex-M1, Nios II, and RISCV without CONFIG_RISCV_HAS_CPU_IDLE
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