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dts: arm: st: remove sensor channels from stm32 adc nodes

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Remove temp-, vref- and vbat-channel from STM32 ADC nodes as it is not
used in the driver anymore.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit is contained in:
Guillaume Gautier 2023-09-06 15:08:31 +02:00 • committed by Carles Cufí
commit fa1f33316d
36 changed files with 0 additions and 130 deletions
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2
dts/arm/st/c0/stm32c0.dtsi
View file

@ -293,8 +293,6 @@
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <9>;
vref-channel = <10>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

2
dts/arm/st/f0/stm32f0.dtsi
View file

@ -338,8 +338,6 @@
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

5
dts/arm/st/f0/stm32f031.dtsi
View file

@ -60,8 +60,3 @@
status = "disabled"; status = "disabled";
}; };
}; };
/* All STM32F0 series have ADC VBAT channel, except STM32F0x0 value line */
&adc1 {
vbat-channel = <18>;
};

2
dts/arm/st/f1/stm32f1.dtsi
View file

@ -339,8 +339,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vref-channel = <17>;
resolutions = <STM32F1_ADC_RES(12)>; resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>; sampling-times = <2 8 14 29 42 56 72 240>;
}; };

2
dts/arm/st/f2/stm32f2.dtsi
View file

@ -366,8 +366,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/f3/stm32f302.dtsi
View file

@ -109,9 +109,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vbat-channel = <17>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

4
dts/arm/st/f3/stm32f303.dtsi
View file

@ -148,9 +148,6 @@
status = "disabled"; status = "disabled";
vref-mv = <3000>; vref-mv = <3000>;
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vbat-channel = <17>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)
@ -166,7 +163,6 @@
status = "disabled"; status = "disabled";
vref-mv = <3000>; vref-mv = <3000>;
#io-channel-cells = <1>; #io-channel-cells = <1>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/f3/stm32f334.dtsi
View file

@ -35,9 +35,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vbat-channel = <17>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/f3/stm32f373.dtsi
View file

@ -191,9 +191,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vref-channel = <17>;
vbat-channel = <18>;
resolutions = <STM32F1_ADC_RES(12)>; resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>; sampling-times = <2 8 14 29 42 56 72 240>;
}; };

4
dts/arm/st/f4/stm32f4.dtsi
View file

@ -513,10 +513,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
/* Temperature and VBAT sensor share channel 18 */
temp-channel = <18>;
vbat-channel = <18>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

4
dts/arm/st/f7/stm32f7.dtsi
View file

@ -743,10 +743,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
/* Temperature and VBAT sensor share channel 18 */
temp-channel = <18>;
vbat-channel = <18>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/g0/stm32g0.dtsi
View file

@ -396,9 +396,6 @@
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <12>;
vref-channel = <13>;
vbat-channel = <14>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/g4/stm32g4.dtsi
View file

@ -109,9 +109,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vbat-channel = <17>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

1
dts/arm/st/g4/stm32g473.dtsi
View file

@ -48,7 +48,6 @@
interrupts = <62 0>; interrupts = <62 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <4>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

1
dts/arm/st/g4/stm32g491.dtsi
View file

@ -64,7 +64,6 @@
interrupts = <47 0>; interrupts = <47 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
vref-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/h5/stm32h5.dtsi
View file

@ -263,9 +263,6 @@
status = "disabled"; status = "disabled";
vref-mv = <3300>; vref-mv = <3300>;
#io-channel-cells = <1>; #io-channel-cells = <1>;
vbat-channel = <2>;
temp-channel = <16>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/h7/stm32h723.dtsi
View file

@ -47,9 +47,6 @@
* ADC, so we redefine the resolution for these devices. * ADC, so we redefine the resolution for these devices.
*/ */
adc3: adc@58026000 { adc3: adc@58026000 {
vbat-channel = <16>;
temp-channel = <17>;
vref-channel = <18>;
resolutions = <STM32H72X_ADC3_RES(12, 0x00) resolutions = <STM32H72X_ADC3_RES(12, 0x00)
STM32H72X_ADC3_RES(10, 0x01) STM32H72X_ADC3_RES(10, 0x01)
STM32H72X_ADC3_RES(8, 0x02) STM32H72X_ADC3_RES(8, 0x02)

6
dts/arm/st/h7/stm32h743.dtsi
View file

@ -21,12 +21,6 @@
}; };
}; };
adc3: adc@58026000 {
vbat-channel = <17>;
temp-channel = <18>;
vref-channel = <19>;
};
dmamux1: dmamux@40020800 { dmamux1: dmamux@40020800 {
dma-requests= <107>; dma-requests= <107>;
}; };

6
dts/arm/st/h7/stm32h745.dtsi
View file

@ -28,12 +28,6 @@
}; };
}; };
adc3: adc@58026000 {
vbat-channel = <17>;
temp-channel = <18>;
vref-channel = <19>;
};
dmamux1: dmamux@40020800 { dmamux1: dmamux@40020800 {
dma-requests= <107>; dma-requests= <107>;
}; };

6
dts/arm/st/h7/stm32h750.dtsi
View file

@ -21,12 +21,6 @@
}; };
}; };
adc3: adc@58026000 {
vbat-channel = <17>;
temp-channel = <18>;
vref-channel = <19>;
};
dmamux1: dmamux@40020800 { dmamux1: dmamux@40020800 {
dma-requests= <107>; dma-requests= <107>;
}; };

6
dts/arm/st/h7/stm32h7a3.dtsi
View file

@ -24,12 +24,6 @@
}; };
}; };
adc2: adc@40022100 {
vbat-channel = <14>;
temp-channel = <18>;
vref-channel = <19>;
};
dmamux1: dmamux@40020800 { dmamux1: dmamux@40020800 {
dma-requests= <107>; dma-requests= <107>;
}; };

2
dts/arm/st/l0/stm32l0.dtsi
View file

@ -309,8 +309,6 @@
interrupts = <12 0>; interrupts = <12 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <18>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

4
dts/arm/st/l0/stm32l011X4.dtsi
View file

@ -18,9 +18,5 @@
reg = <0x08000000 DT_SIZE_K(16)>; reg = <0x08000000 DT_SIZE_K(16)>;
}; };
}; };
adc1: adc@40012400 {
temp-channel = <18>;
};
}; };
}; };

4
dts/arm/st/l0/stm32l031.dtsi
View file

@ -30,9 +30,5 @@
eeprom: eeprom@8080000{ eeprom: eeprom@8080000{
reg = <0x08080000 DT_SIZE_K(1)>; reg = <0x08080000 DT_SIZE_K(1)>;
}; };
adc1: adc@40012400 {
temp-channel = <18>;
};
}; };
}; };

4
dts/arm/st/l0/stm32l051.dtsi
View file

@ -72,9 +72,5 @@
eeprom: eeprom@8080000{ eeprom: eeprom@8080000{
reg = <0x08080000 DT_SIZE_K(2)>; reg = <0x08080000 DT_SIZE_K(2)>;
}; };
adc1: adc@40012400 {
temp-channel = <18>;
};
}; };
}; };

4
dts/arm/st/l0/stm32l071.dtsi
View file

@ -160,9 +160,5 @@
eeprom: eeprom@8080000{ eeprom: eeprom@8080000{
reg = <0x08080000 DT_SIZE_K(6)>; reg = <0x08080000 DT_SIZE_K(6)>;
}; };
adc1: adc@40012400 {
temp-channel = <18>;
};
}; };
}; };

2
dts/arm/st/l1/stm32l1.dtsi
View file

@ -216,8 +216,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <16>;
vref-channel = <17>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/l4/stm32l4.dtsi
View file

@ -390,9 +390,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <17>;
vbat-channel = <18>;
vref-channel = <0>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

1
dts/arm/st/l4/stm32l471.dtsi
View file

@ -261,7 +261,6 @@
interrupts = <47 0>; interrupts = <47 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <17>;
}; };
rtc@40002800 { rtc@40002800 {

3
dts/arm/st/l5/stm32l5.dtsi
View file

@ -659,9 +659,6 @@
interrupts = <37 0>; interrupts = <37 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <17>;
vbat-channel = <18>;
vref-channel = <0>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

6
dts/arm/st/u5/stm32u5.dtsi
View file

@ -743,9 +743,6 @@
interrupts = <37 0>; interrupts = <37 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <19>;
vref-channel = <0>;
vbat-channel = <18>;
resolutions = <STM32_ADC_RES(14, 0x00) resolutions = <STM32_ADC_RES(14, 0x00)
STM32_ADC_RES(12, 0x01) STM32_ADC_RES(12, 0x01)
STM32_ADC_RES(10, 0x02) STM32_ADC_RES(10, 0x02)
@ -761,9 +758,6 @@
interrupts = <113 0>; interrupts = <113 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <13>;
vref-channel = <0>;
vbat-channel = <14>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/wb/stm32wb.dtsi
View file

@ -413,9 +413,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <17>;
vbat-channel = <18>;
vref-channel = <0>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

4
dts/arm/st/wb/stm32wb55.dtsi
View file

@ -9,9 +9,5 @@
/ { / {
soc { soc {
compatible = "st,stm32wb55", "st,stm32wb", "simple-bus"; compatible = "st,stm32wb55", "st,stm32wb", "simple-bus";
adc1: adc@50040000 {
temp-channel = <17>;
};
}; };
}; };

3
dts/arm/st/wba/stm32wba.dtsi
View file

@ -388,9 +388,6 @@
interrupts = <65 0>; interrupts = <65 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <19>;
vref-channel = <0>;
vbat-channel = <18>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

3
dts/arm/st/wl/stm32wl.dtsi
View file

@ -332,9 +332,6 @@
interrupts = <18 0>; interrupts = <18 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
temp-channel = <12>;
vref-channel = <13>;
vbat-channel = <14>;
resolutions = <STM32_ADC_RES(12, 0x00) resolutions = <STM32_ADC_RES(12, 0x00)
STM32_ADC_RES(10, 0x01) STM32_ADC_RES(10, 0x01)
STM32_ADC_RES(8, 0x02) STM32_ADC_RES(8, 0x02)

12
dts/bindings/adc/st,stm32-adc.yaml
View file

@ -70,18 +70,6 @@ properties:
default: 3300 default: 3300
description: Indicates the reference voltage of the ADC in mV (on the target board). description: Indicates the reference voltage of the ADC in mV (on the target board).
temp-channel:
type: int
description: Indicates the ADC channel of the internal temperature sensor.
vref-channel:
type: int
description: Indicates the ADC channel of the internal voltage reference.
vbat-channel:
type: int
description: Indicates the ADC channel of the internal vbat monitoring.
resolutions: resolutions:
type: array type: array
required: true required: true