devicetree: make DT_..._REG_ADDR return unsigned
`DT_..._REG_ADDR` macros do not always return an unsigned value. This commit adds and unsigned 32bit prefix to ensure the value is always unsigned. Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk> Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit is contained in:
parent
71afbaf66e
commit
f98fde07b3
11 changed files with 84 additions and 23 deletions
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@ -37,6 +37,13 @@ Boards
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* Board ``qemu_xtensa`` is deprecated. Use ``qemu_xtensa/dc233c`` instead.
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Devicetree
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**********
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* The :c:macro:`DT_REG_ADDR` macro and its variants are now expanding into an
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unsigned literals (i.e. with a ``U`` suffix). To use addresses as devicetree
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indexes use the :c:macro:`DT_REG_ADDR_RAW` variants.
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STM32
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=====
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@ -164,8 +164,8 @@ static const struct w1_driver_api ds2482_driver_api = {
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.w1_config.slave_count = W1_INST_SLAVE_COUNT(inst), \
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.parent = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
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.i2c_spec = I2C_DT_SPEC_GET(DT_INST_PARENT(inst)), \
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.reg_channel = UTIL_CAT(CHSL_IO, DT_INST_REG_ADDR(inst)), \
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.reg_channel_rb = UTIL_CAT(CHSL_RB_IO, DT_INST_REG_ADDR(inst)), \
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.reg_channel = UTIL_CAT(CHSL_IO, DT_INST_REG_ADDR_RAW(inst)), \
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.reg_channel_rb = UTIL_CAT(CHSL_RB_IO, DT_INST_REG_ADDR_RAW(inst)), \
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.reg_config = DT_INST_PROP(inst, active_pullup) << DEVICE_APU_pos, \
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}; \
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static struct ds2482_data inst_##inst##_data = {0}; \
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@ -2243,6 +2243,34 @@
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#define DT_REG_HAS_NAME(node_id, name) \
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IS_ENABLED(DT_CAT4(node_id, _REG_NAME_, name, _EXISTS))
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/**
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* @brief Get the base raw address of the register block at index @p idx
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*
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* Get the base address of the register block at index @p idx without any
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* type suffix. This can be used to index other devicetree properties, use the
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* non _RAW macros for assigning values in actual code.
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*
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* @param node_id node identifier
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* @param idx index of the register whose address to return
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* @return address of the idx-th register block
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*/
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#define DT_REG_ADDR_BY_IDX_RAW(node_id, idx) \
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DT_CAT4(node_id, _REG_IDX_, idx, _VAL_ADDRESS)
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/**
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* @brief Get a node's (only) register block raw address
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*
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* Get a node's only register block address without any type suffix. This can
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* be used to index other devicetree properties, use the non _RAW macros for
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* assigning values in actual code.
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*
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* Equivalent to DT_REG_ADDR_BY_IDX_RAW(node_id, 0).
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* @param node_id node identifier
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* @return node's register block address
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*/
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#define DT_REG_ADDR_RAW(node_id) \
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DT_REG_ADDR_BY_IDX_RAW(node_id, 0)
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/**
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* @brief Get the base address of the register block at index @p idx
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* @param node_id node identifier
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@ -2250,7 +2278,7 @@
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* @return address of the idx-th register block
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*/
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#define DT_REG_ADDR_BY_IDX(node_id, idx) \
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DT_CAT4(node_id, _REG_IDX_, idx, _VAL_ADDRESS)
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DT_U32_C(DT_REG_ADDR_BY_IDX_RAW(node_id, idx))
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/**
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* @brief Get the size of the register block at index @p idx
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@ -2285,7 +2313,7 @@
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* @param node_id node identifier
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* @return node's register block address
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*/
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#define DT_REG_ADDR_U64(node_id) DT_U64_C(DT_REG_ADDR(node_id))
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#define DT_REG_ADDR_U64(node_id) DT_U64_C(DT_REG_ADDR_BY_IDX_RAW(node_id, 0))
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/**
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* @brief Get a node's (only) register block size
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@ -2303,7 +2331,7 @@
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* @return address of the register block specified by name
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*/
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#define DT_REG_ADDR_BY_NAME(node_id, name) \
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DT_CAT4(node_id, _REG_NAME_, name, _VAL_ADDRESS)
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DT_U32_C(DT_CAT4(node_id, _REG_NAME_, name, _VAL_ADDRESS))
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/**
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* @brief Like DT_REG_ADDR_BY_NAME(), but with a fallback to @p default_value
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@ -2330,7 +2358,7 @@
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* @return address of the register block specified by name
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*/
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#define DT_REG_ADDR_BY_NAME_U64(node_id, name) \
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DT_U64_C(DT_REG_ADDR_BY_NAME(node_id, name))
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DT_U64_C(DT_CAT4(node_id, _REG_NAME_, name, _VAL_ADDRESS))
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/**
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* @brief Get a register block's size by name
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@ -4135,6 +4163,14 @@
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*/
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#define DT_INST_REG_HAS_NAME(inst, name) DT_REG_HAS_NAME(DT_DRV_INST(inst), name)
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/**
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* @brief Get a `DT_DRV_COMPAT` instance's idx-th register block's raw address
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* @param inst instance number
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* @param idx index of the register whose address to return
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* @return address of the instance's idx-th register block
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*/
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#define DT_INST_REG_ADDR_BY_IDX_RAW(inst, idx) DT_REG_ADDR_BY_IDX_RAW(DT_DRV_INST(inst), idx)
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/**
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* @brief Get a `DT_DRV_COMPAT` instance's idx-th register block's address
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* @param inst instance number
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@ -4185,7 +4221,7 @@
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* @return address of the register block with the given @p name
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*/
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#define DT_INST_REG_ADDR_BY_NAME_U64(inst, name) \
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DT_U64_C(DT_INST_REG_ADDR_BY_NAME(inst, name))
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DT_REG_ADDR_BY_NAME_U64(DT_DRV_INST(inst), name)
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/**
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* @brief Get a `DT_DRV_COMPAT`'s register block size by name
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@ -4207,6 +4243,13 @@
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#define DT_INST_REG_SIZE_BY_NAME_OR(inst, name, default_value) \
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DT_REG_SIZE_BY_NAME_OR(DT_DRV_INST(inst), name, default_value)
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/**
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* @brief Get a `DT_DRV_COMPAT`'s (only) register block raw address
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* @param inst instance number
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* @return instance's register block address
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*/
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#define DT_INST_REG_ADDR_RAW(inst) DT_INST_REG_ADDR_BY_IDX_RAW(inst, 0)
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/**
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* @brief Get a `DT_DRV_COMPAT`'s (only) register block address
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* @param inst instance number
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@ -4225,7 +4268,7 @@
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* @param inst instance number
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* @return instance's register block address
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*/
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#define DT_INST_REG_ADDR_U64(inst) DT_U64_C(DT_INST_REG_ADDR(inst))
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#define DT_INST_REG_ADDR_U64(inst) DT_REG_ADDR_U64(DT_DRV_INST(inst))
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/**
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* @brief Get a `DT_DRV_COMPAT`'s (only) register block size
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@ -4887,6 +4930,16 @@
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#define DT_COMPAT_NODE_HAS_PROP_AND_OR(inst, compat, prop) \
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DT_NODE_HAS_PROP(DT_INST(inst, compat), prop) ||
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/**
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* @def DT_U32_C
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* @brief Macro to add 32bit unsigned postfix to the devicetree address constants
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*/
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#if defined(_LINKER) || defined(_ASMLANGUAGE)
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#define DT_U32_C(_v) (_v)
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#else
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#define DT_U32_C(_v) UINT32_C(_v)
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#endif
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/**
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* @def DT_U64_C
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* @brief Macro to add ULL postfix to the devicetree address constants
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@ -148,7 +148,7 @@ extern "C" {
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* @return node identifier for spi_dev's chip select GPIO controller
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*/
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#define DT_SPI_DEV_CS_GPIOS_CTLR(spi_dev) \
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DT_GPIO_CTLR_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
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DT_GPIO_CTLR_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR_RAW(spi_dev))
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/**
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* @brief Get a SPI device's chip select GPIO pin number
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@ -181,7 +181,7 @@ extern "C" {
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* @return pin number of spi_dev's chip select GPIO
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*/
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#define DT_SPI_DEV_CS_GPIOS_PIN(spi_dev) \
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DT_GPIO_PIN_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
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DT_GPIO_PIN_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR_RAW(spi_dev))
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/**
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* @brief Get a SPI device's chip select GPIO flags
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@ -209,7 +209,7 @@ extern "C" {
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* zero if there is none
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*/
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#define DT_SPI_DEV_CS_GPIOS_FLAGS(spi_dev) \
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DT_GPIO_FLAGS_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
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DT_GPIO_FLAGS_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR_RAW(spi_dev))
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/**
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* @brief Equivalent to DT_SPI_DEV_HAS_CS_GPIOS(DT_DRV_INST(inst)).
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@ -321,7 +321,7 @@ struct adc_dt_spec {
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DT_FOREACH_CHILD_VARGS(ctlr, ADC_FOREACH_INPUT, input)
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#define ADC_FOREACH_INPUT(node, input) \
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IF_ENABLED(IS_EQ(DT_REG_ADDR(node), input), (node))
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IF_ENABLED(IS_EQ(DT_REG_ADDR_RAW(node), input), (node))
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#define ADC_CHANNEL_CFG_FROM_DT_NODE(node_id) \
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IF_ENABLED(DT_NODE_EXISTS(node_id), \
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@ -66,7 +66,7 @@
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#define DT_SCMI_TRANSPORT_TX_CHAN_DECLARE(node_id) \
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COND_CODE_1(DT_SCMI_TRANSPORT_PROTO_HAS_CHAN(node_id, 0), \
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(extern struct scmi_channel \
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SCMI_TRANSPORT_CHAN_NAME(DT_REG_ADDR(node_id), 0);), \
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SCMI_TRANSPORT_CHAN_NAME(DT_REG_ADDR_RAW(node_id), 0);), \
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(extern struct scmi_channel \
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SCMI_TRANSPORT_CHAN_NAME(SCMI_PROTOCOL_BASE, 0);)) \
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@ -110,7 +110,7 @@
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*/
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#define DT_SCMI_TRANSPORT_TX_CHAN(node_id) \
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COND_CODE_1(DT_SCMI_TRANSPORT_PROTO_HAS_CHAN(node_id, 0), \
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(&SCMI_TRANSPORT_CHAN_NAME(DT_REG_ADDR(node_id), 0)), \
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(&SCMI_TRANSPORT_CHAN_NAME(DT_REG_ADDR_RAW(node_id), 0)), \
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(&SCMI_TRANSPORT_CHAN_NAME(SCMI_PROTOCOL_BASE, 0)))
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/**
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@ -211,9 +211,9 @@
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#define DT_SCMI_PROTOCOL_DEFINE(node_id, init_fn, pm, data, config, \
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level, prio, api) \
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DT_SCMI_TRANSPORT_CHANNELS_DECLARE(node_id) \
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DT_SCMI_PROTOCOL_DATA_DEFINE(node_id, DT_REG_ADDR(node_id), data); \
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DT_SCMI_PROTOCOL_DATA_DEFINE(node_id, DT_REG_ADDR_RAW(node_id), data); \
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DEVICE_DT_DEFINE(node_id, init_fn, pm, \
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&SCMI_PROTOCOL_NAME(DT_REG_ADDR(node_id)), \
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&SCMI_PROTOCOL_NAME(DT_REG_ADDR_RAW(node_id)), \
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config, level, prio, api)
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/**
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@ -247,7 +247,7 @@
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*/
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#define DT_SCMI_PROTOCOL_DEFINE_NODEV(node_id, data) \
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DT_SCMI_TRANSPORT_CHANNELS_DECLARE(node_id) \
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DT_SCMI_PROTOCOL_DATA_DEFINE(node_id, DT_REG_ADDR(node_id), data)
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DT_SCMI_PROTOCOL_DATA_DEFINE(node_id, DT_REG_ADDR_RAW(node_id), data)
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/**
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* @brief Create an SCMI message field
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@ -63,7 +63,7 @@ extern "C" {
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.cs = { \
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.gpio = GPIO_DT_SPEC_GET_BY_IDX_OR(DT_PHANDLE(DT_PARENT(node_id), \
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spi_dev), cs_gpios, \
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DT_REG_ADDR(node_id), \
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DT_REG_ADDR_RAW(node_id), \
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{}), \
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.delay = (delay_), \
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}, \
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@ -212,7 +212,8 @@ extern "C" {
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* @return #gpio_dt_spec struct corresponding with mspi_dev's chip enable
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*/
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#define MSPI_DEV_CE_GPIOS_DT_SPEC_GET(mspi_dev) \
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GPIO_DT_SPEC_GET_BY_IDX_OR(DT_BUS(mspi_dev), ce_gpios, DT_REG_ADDR(mspi_dev), {})
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GPIO_DT_SPEC_GET_BY_IDX_OR(DT_BUS(mspi_dev), ce_gpios, \
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DT_REG_ADDR_RAW(mspi_dev), {})
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/**
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* @brief Get a <tt>struct gpio_dt_spec</tt> for a MSPI device's chip enable pin
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@ -211,7 +211,7 @@ struct spi_cs_control {
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*/
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#define SPI_CS_GPIOS_DT_SPEC_GET(spi_dev) \
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GPIO_DT_SPEC_GET_BY_IDX_OR(DT_BUS(spi_dev), cs_gpios, \
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DT_REG_ADDR(spi_dev), {})
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DT_REG_ADDR_RAW(spi_dev), {})
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/**
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* @brief Get a <tt>struct gpio_dt_spec</tt> for a SPI device's chip select pin
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#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
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{ \
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.phys_addr = UINT32_C(DT_REG_ADDR(node_id)), \
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.phys_addr = DT_REG_ADDR(node_id), \
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.size = DT_REG_SIZE(node_id) \
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}
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#define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \
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{ \
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.phys_addr = UINT32_C(DT_REG_ADDR_BY_NAME(node_id, name)), \
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.phys_addr = DT_REG_ADDR_BY_NAME(node_id, name), \
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.size = DT_REG_SIZE_BY_NAME(node_id, name) \
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}
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@ -2948,7 +2948,7 @@ ZTEST(devicetree_api, test_fixed_partitions)
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* Test this by way of string comparison.
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*/
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zassert_true(!strcmp(TO_STRING(DT_FIXED_PARTITION_ADDR(TEST_PARTITION_2)),
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"(__REG_IDX_0_VAL_ADDRESS + 458624)"));
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"(__REG_IDX_0_VAL_ADDRESSU + 458624U)"));
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zassert_equal(DT_REG_ADDR(TEST_PARTITION_2), 458624);
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/* Test that all DT_FIXED_PARTITION_ID are defined and unique. */
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